Hydrogen Barrier Structure for RRAM Memory Retention
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Solution Overview
Problem
Hydrogen released during the high-temperature manufacturing process of semiconductor structures can degrade the memory element in resistive random access memory (RRAM) devices, affecting their retention and performance.
Innovation Solution
A semiconductor structure with a hydrogen barrier structure is designed, comprising a barrier layer and barrier liners that prevent hydrogen diffusion from the dielectric layer to the interlayer conductors and from the processing atmosphere to the memory element, using materials like silicon nitride and titanium nitride to form a hydrogen-impermeable barrier.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hydrogen barrier structures are added to prevent hydrogen diffusion, then memory element retention is improved, but device complexity increases
Solution Approach 1:
The patent implements a nested barrier structure where a first barrier liner is disposed on the sidewall of the interlayer conductor, and a second barrier liner is disposed on the sidewall of the memory element, with the barrier layer covering the dielectric layer. This nested arrangement of multiple barrier layers at different levels provides comprehensive hydrogen protection while integrating seamlessly into the existing memory structure
Solution Approach 2:
The barrier layer made of silicon nitride serves as an intermediary between the dielectric layer and the memory element, preventing hydrogen diffusion from the dielectric layer to the memory element. The barrier liners made of titanium nitride act as intermediaries at critical interfaces, blocking hydrogen pathways without interfering with the electrical functionality of the memory device
2Stability of the object's composition
If barrier layers and barrier liners are added to block hydrogen, then memory element stability is improved, but manufacturing complexity increases
Solution Approach 1:
The barrier layer is formed on the dielectric layer before the memory element is formed, and the barrier liners are deposited on the sidewalls of the interlayer conductors before filling the conductive material. This preliminary formation of barrier structures ensures that hydrogen protection is in place before the memory element is created, preventing hydrogen contamination from the outset
Solution Approach 2:
The patent employs composite material structures where the barrier layer is made of silicon nitride and the barrier liners are made of titanium nitride, combining different materials with complementary properties. The silicon nitride barrier layer provides bulk hydrogen blocking, while the titanium nitride barrier liners provide interface protection, creating a composite barrier system that addresses multiple hydrogen diffusion pathways
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The hydrogen barrier structure effectively prevents hydrogen diffusion, thereby enhancing the retention and stability of the memory element, ensuring the semiconductor structure's integrity and performance.
Implementation Method 1
A barrier layer is disposed on the dielectric layer. A first barrier liner is disposed on a sidewall of the first interlayer conductor, wherein the first interlayer conductor is physically separated from the dielectric layer by the first barrier liner
Data Source
AI summary
A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises an access device, a dielectric layer, a barrier layer, a first interlayer conductor, a first barrier liner, a second interlayer conductor, a second barrier liner, a memory element and a top electrode layer. The access device has two terminals. The dielectric layer covers the access device. The barrier layer is disposed on the dielectric layer. The first and second interlayer conductors are connected to the two terminals, respectively. The first and second barrier liners are disposed on sidewalls of the first and second interlayer conductors, respectively. The memory element is disposed on the first interlayer conductor. The top electrode layer is disposed on the barrier layer and the memory element and covers the memory element.