RRAM Programming Current Control via Selector Transistor Feedback

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Solution Overview

Problem

Conventional methods for programming resistive random-access memory (RRAM) cells face challenges in controlling the current required for setting memory cells, often resulting in either under-setting or over-setting, making it difficult to retain the programmed state due to variations in current distribution.

Innovation Solution

A memory system and programming method that utilize a combination of signals, where an initial signal forms an electrically conductive structure and a subsequent signal is applied to ensure the structure is 'well-set', using both selector transistor regulation and a current source to maintain the low resistance state, thereby controlling the current within a desired window.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a selector transistor is used to regulate current for programming memory cells, then the transistor can be positioned close to the cell for compact design, but significant current variations occur resulting in unreliable programming

Engineering Contradiction:
Improvememory cell areaVSAvoidprogramming reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

A current source is introduced as an intermediary component between the selector transistor and the memory cell. This current source actively compensates for current variations by providing a stabilizing effect, ensuring that the memory cell receives a consistent programming current despite transistor positioning close to the cell for compact design.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If a current source is used outside the memory array to provide set program pulses, then tighter DC current distribution is achieved, but transient current spikes from bit line capacitance cannot be prevented

Engineering Contradiction:
Improvecurrent distribution precisionVSAvoidtransient current spike
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The selector transistor gate is regulated before the set program pulse is applied to preemptively control the bit line capacitance discharge. By adjusting the gate voltage in advance, the transistor is prepared to limit the transient current spike that would otherwise occur when the current source is activated, thus preventing harmful current peaks before they can damage the memory cell.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If high current is used to program memory cells, then the set state can be achieved, but the memory cell may be overset making recovery to reset condition difficult or impossible

Engineering Contradiction:
Improveset state retentionVSAvoidoverset condition
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A feedback mechanism is implemented where the selector transistor gate voltage is dynamically regulated based on the current flowing through the memory cell. This feedback control ensures that the current remains within the optimal programming window, achieving reliable set state retention while preventing excessive current that would cause overset conditions and potential cell damage.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively programs RRAM cells from a high to a low resistance state, ensuring data retention by maintaining the low resistance state and preventing transient current spikes, thus overcoming the limitations of conventional methods.

Implementation Method 1

This programming is achieved with an electric field inducing ionic migration from an ion reservoir layer to an insulating layer, causing a conductive filament or 'bridge' to form.

Methodology Applied
Scientific EffectIonic migration: Ion Repulsion/Attraction

Data Source

PatentUS11011229B2Memory systems and memory programming methods
Publication Date: 2021.05.18 MICRON TECHNOLOGY INC
  • US11011229B2 patent drawing
  • US11011229B2 patent drawing
  • US11011229B2 patent drawing

AI summary

Memory systems and memory programming methods are described. In one arrangement, a memory system includes a memory cell configured to have a plurality of different memory states, an access circuit coupled with the memory cell and configured to provide a first signal to a memory element of the memory cell to program the memory cell from a first memory state to a second memory state, and a current source coupled with the memory cell and configured to generate a second signal which is provided to the memory element of the memory cell after the first signal to complete programming of the memory cell from the first memory state to the second memory state.