RRAM Reset Voltage Boosting Circuit for Small Resistance Cells
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Solution Overview
Problem
Non-volatile semiconductor memory devices, particularly RRAM devices, face performance and reliability issues due to the inability to trigger a reset operation when the resistance value of a memory cell is too small, leading to insufficient reset voltage.
Innovation Solution
A method and device that sense the resistance value of a memory cell and boost the reset voltage during a boosting period to ensure the reset operation is successful, using a boosting circuit to adjust the word-line, source-line, or bit-line voltage accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a standard reset voltage is applied to the memory cell, then the reset operation can be performed on memory cells with normal resistance values, but the reset operation fails when the resistance value of the memory cell is too small
Solution Approach 1:
The reset voltage is made dynamic rather than fixed. The boosting circuit adjusts the reset voltage level based on the sensed resistance value of the memory cell, providing a higher boosted reset voltage for cells with small resistance values and standard reset voltage for cells with normal resistance values. This dynamic adjustment ensures reliable reset operations across all resistance value ranges.
Solution Approach 2:
The reset voltage parameter is changed based on the resistance value condition. When a memory cell with small resistance value is detected, the reset voltage parameter is modified to a higher level through the boosting circuit. This parameter change allows the reset operation to succeed for memory cells that would otherwise fail with standard reset voltage.
2Reliability
If the reset voltage is increased to trigger reset operation on memory cells with small resistance values, then the reset operation succeeds, but the device complexity increases due to the boosting circuit
Solution Approach 1:
The resistance value of the memory cell is sensed in advance before the reset operation is executed. Based on this preliminary sensing, the boosting circuit is activated only when needed (for small resistance values), rather than being always active. This preliminary detection approach reduces unnecessary complexity while ensuring reset reliability when required.
Solution Approach 2:
The boosting circuit acts as an intermediary component between the standard voltage supply and the memory cell. It conditionally transforms the standard reset voltage into a boosted reset voltage only when the memory cell has small resistance value. This intermediary approach adds minimal complexity while solving the reset reliability problem for specific cases.
3Reliability
If a boosted reset voltage is applied during the boosting period, then the reset operation is triggered for memory cells with small resistance values, but the energy consumption increases
Solution Approach 1:
The boosted reset voltage is applied partially, only during a specific boosting period at the beginning of the reset operation and only when needed for memory cells with small resistance values. For memory cells with normal resistance values, the standard reset voltage is used without boosting. This partial application of excessive voltage minimizes energy consumption while ensuring reset reliability when necessary.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The boosted reset voltage effectively triggers the reset operation even for memory cells with small resistance values, enhancing the performance and reliability of RRAM devices.
Implementation Method 1
boosting a reset voltage in a boosting period of a reset period according to the resistance value of the memory cell to generate a boosted reset voltage
Data Source
AI summary
A resistive random access memory device which includes a resistive random access memory array, a sense amplifier and a boosting circuit. The sense amplifier is coupled to the resistive random access memory array and is configured to sense a resistance value of the memory cell. The boosting circuit is coupled to the memory cell of the resistive random access memory array and is configured to boost a reset voltage in a boosting period of a reset period according to the resistance value of the memory cell. The boosting period is from beginning of the reset period, and the memory cell is biased with the reset voltage in the reset period to perform the reset operation. A method for a reset operation on a resistive random access memory device is also introduced.


