RRAM Write Circuitry for Selective Redundancy Programming

Solution Overview

Problem

Current RRAM devices implementing a two-cells per one-bit scheme require two programming cycles, consuming twice the current and taking longer than necessary due to resistance variability and reliability issues.

Innovation Solution

A memory device with enhanced write circuitry that detects whether a write operation is reliable, allowing it to skip the redundant operation if the main array write is stable, using a current mirror circuit to determine the reliability of the write operation and adjust accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a two-cells per one-bit redundancy scheme is implemented, then reliability is improved, but current consumption and programming time are doubled

Engineering Contradiction:

Improvememory reliabilityVSAvoidcurrent consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies partial action by performing redundancy writes selectively rather than always. The write circuitry monitors the main array write operation and only triggers a redundancy array write when the main write is determined to be unreliable, thus consuming current only when necessary for reliability correction

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The patent implements feedback through monitoring circuitry that observes the main array write operation results and uses this information to control whether the redundancy array write is triggered. This feedback mechanism allows the system to adapt current consumption based on actual write reliability

Inventive Principle:

Principle #23Feedback

2Reliability

If a two-cells per one-bit redundancy scheme is implemented, then reliability is improved, but programming time is doubled

Engineering Contradiction:

Improvememory reliabilityVSAvoidprogramming time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by performing redundancy writes selectively rather than always. The write circuitry monitors the main array write operation and only triggers a redundancy array write when the main write is determined to be unreliable, thus consuming current only when necessary for reliability correction

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The patent implements feedback through monitoring circuitry that observes the main array write operation results and uses this information to control whether the redundancy array write is triggered. This feedback mechanism allows the system to adapt current consumption based on actual write reliability

Inventive Principle:

Principle #23Feedback

3Reliability

If redundant writes are always performed, then reliability is ensured, but power consumption increases

Engineering Contradiction:

Improvewrite operation reliabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies partial action by performing redundancy writes selectively rather than always. The write circuitry monitors the main array write operation and only triggers a redundancy array write when the main write is determined to be unreliable, thus consuming current only when necessary for reliability correction

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The patent implements feedback through monitoring circuitry that observes the main array write operation results and uses this information to control whether the redundancy array write is triggered. This feedback mechanism allows the system to adapt current consumption based on actual write reliability

Inventive Principle:

Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Reduces power consumption and programming time by disabling unnecessary redundant writes, improving performance and efficiency in RRAM devices.

Implementation Method 1

using a current mirror circuit to determine the reliability of the write operation

Methodology Applied

Scientific EffectCurrent mirror:

Implementation Method 2

Resistive Random Access Memory (RRAM) is a memory technology that uses a change in resistance rather than charge to store bits of information

Methodology Applied

Scientific EffectResistive switching:

Data Source

PatentUS12562224B2Resistive memory with enhanced redundancy writing

Publication Date: 2026.02.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A memory device includes a main array comprising main memory cells; a redundancy array comprising redundancy memory cells; and write circuitry configured to perform a first programming operation on a main memory cell, to detect whether a current of the main memory cell exceeds a predefined current threshold during the first programming operation, and to disable a second programming operation for a redundancy memory cell if the current of the main memory cell exceeds the predefined current threshold during the first programming operation.