RRAM Shift Circuit Merging Storage and Bit Shift Logic
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Solution Overview
Problem
Existing circuit structures for implementing shift operations are complex, leading to low computational efficiency in computing systems.
Innovation Solution
A circuit unit comprising four switches and one resistive random-access memory element, which simplifies the structure and improves computational efficiency by allowing both data before and after shifting to be stored in the memory element, reducing the need for memory bandwidth and enabling a fusion of computation and storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a traditional circuit structure with multiple components is used to implement a shift operation, then the shift operation can be performed, but the circuit structure becomes complex and computational efficiency decreases
Solution Approach 1:
The patent combines the storage function and computation function into a single resistive random-access memory element. The memory element stores data in its resistance state (high or low impedance) and simultaneously participates in the shift operation through controlled current flow paths, eliminating the need for separate storage and computation components.
Solution Approach 2:
The resistive random-access memory element serves multiple functions: it acts as both a storage element (holding data in high/low impedance states) and a computational element (participating in shift operations through controlled current paths). This multi-functionality reduces the overall circuit complexity while maintaining computational efficiency.
2Productivity
If data is stored in separate memory locations before and after shifting, then the shift operation can be performed, but the memory bandwidth requirement increases
Solution Approach 1:
The patent merges the before-shift and after-shift data storage functions into the same resistive random-access memory element. By controlling the current flow paths through switches, the element can hold data in different states representing before-shift and after-shift values, eliminating the need for separate storage locations and reducing memory bandwidth requirements.
3Productivity
If more circuit components are used to implement the shift operation, then the shift functionality can be achieved, but the power consumption increases
Solution Approach 1:
The patent combines storage and computation in a single memory element, reducing the total number of active components that consume power. The resistive random-access memory element maintains data passively in its resistance state without requiring continuous power, and the shift operation uses controlled current paths through switches rather than active computation circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution significantly reduces the number of circuit components, simplifies the operation steps, lowers power consumption, and enhances computational efficiency by storing data in the resistive random-access memory element, thereby improving overall system performance.
Implementation Method 1
a resistive random-access memory element M, a first switch S1, a second switch S2, a third switch S3, and a fourth switch S4... the resistive random-access memory element presents a low impedance state when a difference between a voltage of the positive input end of the resistive random-access memory element and a voltage of the negative input end of the resistive random-access memory element is not less than a set voltage of the resistive random-access memory; the resistive random-access memory element presents a high impedance state when a difference between a voltage of the positive input end of the resistive random-access memory element and a voltage of the negative input end of the resistive random-access memory element is not greater than a reset voltage of the resistive random-access memory element
Data Source
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AI summary
A circuit and an array circuit for implementing a shift operation are provided. The circuit for implementing a shift operation includes a resistive random-access memory and four switches, where a first switch is closed when a first end of the first switch is at a low level, a fourth switch is closed when a first end of the fourth switch is at a low level, a second switch is closed when a first end of the second switch is at a high level, and a third switch is closed when a first end of the third switch is at a high level; a second end of the first switch and a second end of the third switch are connected to a negative input end of the resistive random-access memory; a second end of the second switch and a second end of the fourth switch are connected to a positive input end of the resistive random-access memory; the first end of the first switch, the first end of the second switch, the first end of the third switch, and the first end of the fourth switch are connected to an output end of a previous-stage circuit for implementing a shift operation; a third end of the first switch and a third end of the second switch are connected to a bias voltage end; and a third end of the third switch and a third end of the fourth switch are connected to a ground end. The shift circuit has a simple structure and can improve computational efficiency.