RRAM Spacer Self-Alignment for Etch Protection

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Solution Overview

Problem

Current RRAM manufacturing methods face challenges in shrinking device size and protecting contact structures from etching damage, leading to inefficiencies in yield and alignment issues due to the limitations of critical dimension constraints.

Innovation Solution

The method involves forming spacers within the opening to cover the contact structure, ensuring the RRAM width and opening width are equal to the critical dimension, allowing for minimized device size and enhanced protection against etching damage, while using a spacer material that provides etch selectivity and a conformal electrode structure to maintain precise alignment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the opening size is reduced to shrink device size, then the device size can be minimized, but the contact structure becomes more vulnerable to etching damage

Engineering Contradiction:
Improvedevice sizeVSAvoidcontact structure integrity
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The spacer is formed in the opening before the RRAM etching process, serving as a protective structure that prevents etching damage to the contact structure during subsequent manufacturing steps

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The spacer acts as an intermediary protective layer between the etching process and the contact structure, shielding the contact structure from direct exposure to etching chemicals while allowing the RRAM to be properly formed

Inventive Principle:
Principle #24Intermediary (Mediator)

2Length of moving object

If the RRAM width is reduced to meet critical dimension constraints, then device miniaturization is achieved, but alignment precision becomes more difficult to maintain

Engineering Contradiction:
ImproveRRAM widthVSAvoidalignment precision
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The patent replaces traditional mechanical alignment methods with spacer-based self-alignment, where the spacer's position relative to the contact structure automatically defines the RRAM placement, eliminating the need for complex lithographic alignment at critical dimensions

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If traditional manufacturing methods are used without spacers, then the process is simpler, but the contact structure suffers from etching damage reducing yield

Engineering Contradiction:
Improvemanufacturing process complexityVSAvoidmanufacturing yield
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The spacer serves as a protective intermediary structure that shields the contact structure from etching damage during RRAM formation, significantly improving manufacturing yield despite the additional process step required to form the spacer

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9799705B1Semiconductor device and method of making the same
Publication Date: 2017.10.24 UNITED MICROELECTRONICS CORP
  • US9799705B1 patent drawing
  • US9799705B1 patent drawing
  • US9799705B1 patent drawing

AI summary

The present invention provides a semiconductor device. The semiconductor device includes a contact structure disposed in a first dielectric layer, a second dielectric layer disposed on the first dielectric layer and having an opening disposed therein, a spacer disposed in the opening and partially covering the contact structure, and a resistive random-access memory (RRAM) disposed on the contact structure and directly contacting the spacer, wherein the RRAM includes a bottom electrode, a top electrode, and a switching resistance layer disposed between the bottom electrode and the top electrode.