RRAM Retention via Ti Capping Layer Inversion

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Solution Overview

Problem

Conventional RRAM manufacturing processes lead to partial oxidation of the metal capping layer during the etching of the upper electrode, causing oxygen diffusion and 'pinning' of filaments, resulting in data retention issues due to the recombination of oxygen vacancies.

Innovation Solution

The RRAM cell architecture is modified with the metal capping layer positioned below the variable resistance dielectric layer, ensuring it is not oxidized during the etching process, and becomes part of the bottom electrode, thus maintaining the integrity of the filament region and enhancing data retention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the metal capping layer is positioned above the variable resistance dielectric layer during conventional RRAM manufacturing, then the etching process can effectively remove the upper electrode, but the metal capping layer undergoes partial oxidation and oxygen diffusion occurs

Engineering Contradiction:

Improveetching process effectivenessVSAvoiddata retention

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent inverts the conventional layer stacking order by positioning the metal capping layer below the variable resistance dielectric layer instead of above it. This inversion prevents the metal capping layer from being exposed to the etching process and subsequent oxidation, thereby maintaining filament integrity and improving data retention while preserving etching effectiveness for the upper electrode

Inventive Principle:

Principle #13The other way round (Inversion)

2Productivity

If the metal capping layer is exposed during the etching of the upper electrode, then the etching can be completed, but the metal capping layer suffers from sidewall oxidation

Engineering Contradiction:

Improveetching completionVSAvoidfilament region integrity

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

By inverting the layer stack to place the metal capping layer below the dielectric layer, the patent ensures that the metal capping layer remains protected during the upper electrode etching process, preventing sidewall oxidation and maintaining precise filament region geometry

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The variable resistance dielectric layer acts as an intermediary protective barrier between the metal capping layer and the etching process. By positioning the dielectric layer above the metal capping layer, it shields the metal from direct exposure to etchants and oxygen, preventing oxidation while allowing the etching to complete the upper electrode removal

Inventive Principle:

Principle #24Intermediary (Mediator)

3Device complexity

If the metal capping layer is positioned above the dielectric layer, then the structure follows conventional design, but oxygen diffusion pins the filaments causing resistance state degradation

Engineering Contradiction:

Improvestructural simplicityVSAvoidresistance state stability

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent inverts the conventional structure by placing the metal capping layer below the dielectric layer, which prevents oxygen diffusion from the metal into the dielectric layer. This inversion maintains structural simplicity while eliminating the filament pinning effect and preserving resistance state stability

Inventive Principle:

Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively prevents sidewall oxidation of the metal capping layer, maintaining clear resistance states and improving data retention by positioning the oxidation-prone areas away from the filament region, allowing for better discernment between 'set' and 'reset' resistances.

Implementation Method 1

Conventional RRAM manufacturing processes lead to partial oxidation of the metal capping layer during the etching of the upper electrode

Methodology Applied

Scientific EffectOxidation: Oxidation

Implementation Method 2

causing oxygen diffusion and 'pinning' of filaments, resulting in data retention issues due to the recombination of oxygen vacancies

Methodology Applied

Scientific EffectDiffusion: Diffusion

Implementation Method 3

RRAM retention by depositing Ti capping layer before HK HfO

Methodology Applied

Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS9385316B2RRAM retention by depositing Ti capping layer before HK HfO

Publication Date: 2016.07.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

The present disclosure relates to a resistance random access memory (RRAM) device architecture where a Ti metal capping layer is deposited before the deposition of the HK HfO resistance switching layer. Here, the capping layer is below the HK HfO layer, and hence no damage will occur during the top RRAM electrode etching. The outer sidewalls of the capping layer are substantially aligned with the sidewalls of the HfO layer and hence any damage that may occur during future etching steps will happen at the outer side walls of the capping layer that are positioned away from the oxygen vacancy filament (conductive filament) in the HK HfO layer. Thus the architecture in the present disclosure, improves data retention.