RRAM Read Stability via Verification Voltage Pulse
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Solution Overview
Problem
RRAMs experience instability and high reading errors due to the wide distribution of reset current values, leading to verification failures, which are exacerbated by the diffusion of oxygen and the effects of tightening and loosening traps during the programming process.
Innovation Solution
The proposed operation method for RRAM involves providing a reset voltage pulse, a dummy voltage pulse, and a verification voltage pulse, with the verification voltage pulse having a higher voltage level than the reading voltage pulse, and incorporating a waiting period between the reset and verification pulses to improve stability and reduce errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a read verification is performed using the same voltage level as the read operation, then the reading process is simple, but the reading stability is poor and verification failures occur frequently
Solution Approach 1:
The patent applies preliminary action by performing a verification read operation at a higher voltage level before the actual read operation. This preliminary verification ensures that the RRAM cell is properly set and prevents verification failures during the actual read, thereby improving reading stability without significantly increasing overall process complexity.
Solution Approach 2:
The patent changes the voltage parameter by using a verification voltage level that is higher than the normal read voltage level. This parameter change allows for more reliable verification of the RRAM cell state, as the higher voltage provides a stronger signal that is less susceptible to noise and variability, thus improving reading stability.
2Measurement precision
If the verification voltage level is increased to improve reading stability, then the reading accuracy improves, but the power consumption increases
Solution Approach 1:
The patent applies partial action by using a higher verification voltage only for the verification read operation, not for the actual read operation. This allows achieving better reading accuracy during verification while limiting the power consumption increase to only the verification step, rather than continuously consuming higher power during all read operations.
3Reliability
If multiple verification reads are performed to improve reading reliability, then the reading accuracy improves, but the operating time increases
Solution Approach 1:
The patent performs the verification read as a preliminary action before the actual read operation. This single preliminary verification is sufficient to ensure reliability, avoiding the need for multiple iterative verification reads and thus minimizing the time penalty while achieving improved reading reliability.
Data Source
AI summary
The present invention provides an operation method for RRAM. The operation method includes providing a reset voltage pulse to a RRAM, providing a dummy voltage pulse to the RRAM, and providing a verification voltage pulse to the RRAM. The reset current of the RRAM is read when the verification voltage pulse is provided. The voltage level of the verification voltage pulse is higher than the voltage level of the read voltage pulse for reading the RRAM.