Wafer-Level RRAM Initialization for Circuit Integration
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Solution Overview
Problem
The increasing demand for computational circuitry with nonvolatile memory that is high in access rates, low in power consumption, and compact in size poses challenges due to increased complexity and cost, particularly in the integration of defective parts and limited space on integrated circuitry.
Innovation Solution
The method involves initializing Resistive Random Access Memory (RRAM) storage cells at the wafer level before die assembly and packaging, allowing for concurrent initialization of RRAM storage cells using charge potential, plasma, or radiation, which enables them to switch between resistive states for data storage, and includes testing to identify functional die for efficient assembly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If RRAM storage cells are initialized and tested at the die level after assembly, then individual defective parts can be identified, but the complexity and cost of the process increases significantly
Solution Approach 1:
The patent applies preliminary action by initializing and testing RRAM storage cells at the wafer level before die assembly and packaging. This allows defective cells to be identified and marked early in the manufacturing process, avoiding the need for complex post-assembly testing and rework. The wafer-level initialization uses plasma or radiation exposure to set all RRAM cells to a known state, followed by functional testing to identify good and bad cells before the wafer is divided into individual dies.
Solution Approach 2:
The patent merges multiple operations (initialization and testing) into a single wafer-level process rather than performing them separately at the die level. By combining these functions at the wafer stage, the process complexity is reduced while maintaining the ability to identify functional cells. This merging eliminates the need for repeated handling and testing at later assembly stages.
2Reliability
If more space is allocated for testing and initialization circuitry, then functional identification improves, but available space for computational circuitry decreases
Solution Approach 1:
The patent extracts the initialization and testing functions from the final product design and performs them temporarily during manufacturing using wafer-level processing. Specialized initialization circuitry and testing equipment are applied at the wafer stage but are not permanently integrated into the individual dies. This allows comprehensive functional identification without consuming valuable space in the final computational circuitry design.
Solution Approach 2:
By performing initialization and testing at the wafer level before assembly, the patent eliminates the need for dedicated initialization and testing circuitry in the final product. The preliminary actions taken during manufacturing leave the RRAM cells in a known functional state, and the results are used to sort and package only good cells, freeing up space for computational circuitry in the final design.
3Manufacturing precision
If RRAM storage cells are initialized using high voltage or plasma, then proper resistive states are achieved, but the risk of damaging other circuitry increases
Solution Approach 1:
The patent segments the wafer into regions with RRAM storage cells and regions with other sensitive circuitry. During wafer-level initialization using plasma or radiation, only the RRAM cell regions are exposed to the initializing conditions, while other circuitry is protected or excluded from the process. This segmentation allows proper resistive state formation in RRAM cells without damaging other sensitive components on the same wafer.
Solution Approach 2:
The patent uses an intermediary approach by applying plasma or radiation initialization only to specific regions containing RRAM cells, rather than exposing the entire wafer uniformly. The initialization process is targeted and controlled, using intermediaries such as masks or selective exposure methods to protect other circuitry while still achieving proper resistive state formation in the RRAM storage cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the complexity and cost of forming computational circuitry by enabling efficient initialization and testing of RRAM storage cells at the wafer level, ensuring high functionality and compact integration with reduced defective parts, thus addressing the challenges of increased integration and space constraints.
Implementation Method 1
altering an initial resistivity of substantially all of the RRAM storage cells... permitting the storage cells to act as data storage
Implementation Method 2
applying a charged plasma to the wafer, the charged plasma initializing storage media of the RRAM storage cell arrays
Implementation Method 3
applying initializing radiation to the wafer, the initializing radiation initializing storage media of the RRAM storage cell arrays
Data Source
AI summary
A method of forming a circuitry includes providing a substrate comprising a plurality of die. Each die includes a plurality of resistive random access memory (RRAM) storage cells. The method further includes concurrently initializing substantially all of the RRAM storage cells on the same wafer. Initializing can include applying a voltage potential across the RRAM storage cells.