Solid-State Devices TRIZ Cases

A high-conductivity interlayer sheet bridges flip-chip memory and substrate to establish parallel thermal paths.

A nitrogen-free insulating layer separates the touch sensor electrode from the overcoat.

Protective layers shield image sensing elements during back side grinding, enabling thinner substrates without warpage or contamination.

Micro light-emitting diodes in a transparent display area maintain light transmittance and brightness without reducing lifespan.

Block copolymer self-assembly creates aligned metal nanowires for wire grid polarizers, resolving humidity degradation issues in liquid crystal displays.

A light emitting device uses a protecting element to guide resin flow along its surface for precise cover member formation.

Strip floating shielding patterns under data lines prevent light leakage without widening the black matrix, preserving the aperture ratio.

A metal oxide barrier layer reduces black spot generation by filtering sub-micrometer particles from the electrode surface.

Auxiliary wiring with a high-absorption layer enables selective organic layer removal, preventing misalignment and improving manufacturing yield.

Metal banks with openings isolate light conversion layers, preventing adjacent pixel light mixing while maintaining high display resolution.

A trench gate oxide structure with a thicker first layer and thinner second layer reduces electrical leakage between the buried gate and junction region.

A composite barrier layer with a recessed gate dielectric reduces electron density under the gate electrode.

A conversion retarder adjusts optical transmissivity via phase delay manipulation.

An array mask guides transfer heads through alignment holes to resolve misalignment defects during micro LED placement.

An electrorheological layer transitions between liquid and solid states to support flexible bending in display panels.

Staging cavities and sacrificial release layers reduce pick-up pressure during micro device transfer by isolating adhesion forces from the carrier substrate.

Sharing deep blue sub-pixels across pixels increases the aperture ratio while maintaining operational lifetime.

Concave black matrix sidewalls redirect splashing color film droplets to adjacent pixels, preventing cross-contamination and improving display yield.

A thin film transistor uses a doped silicon gate electrode to block heat flow during active layer crystallization.

Distinct pixel spacing in bending and non-bending regions reduces stress intensity, resolving the trade-off between resolution and reliability.

A vertical channel memory device uses anisotropic etching to separate charge storage layers within a trench structure.

A CMOS image sensor uses segmented isolation regions to electrically separate the pixel array from the peripheral logic circuit.

Thickened organic insulating layer in pixel regions directs emitted light to correct color filters, suppressing leakage from adjacent pixels.

A tantalum oxynitride resistance variable layer enables reversible high-speed switching between electrical states in nonvolatile memory devices.

A curved display device adjusts color filter spacing to align pixel electrodes across the screen surface.

Anisotropic deposition and patterning create semiconductor fins with distinct channel heights, resolving quantized output limitations in fixed-height devices.

Integrates single layer ceramic devices with multilayer capacitors into a monolithic structure for high capacitance density.

A display panel uses a thinner reflection reduction layer in white subpixels to enhance visibility without adding bulk.

Sequential resin layers with adjusted viscosities prevent delamination and ensure uniform phosphor distribution in light-emitting devices.

Curved spacer bumps define asymmetric electrode overlap widths to constrain pixel dimensions in organic light emitting displays.

Arrester element creates current path around isolation layer when voltage exceeds threshold.

Segmented sealing borders prevent oxygen diffusion into luminescent materials, maintaining component integrity while simplifying batch manufacturing.

Stress-induced spalling transfers inorganic LED layers onto a thin film transistor backplane array.

Vertical electric connection structure reduces OLED module area by replacing parallel wiring with multi-layer stacked wires.

A gray-tone photolithography process forms switch and photoelectric sensing devices on a sensor substrate using variable exposure doses.

A stacked composite switch couples a group III-V transistor over a group IV device using through-semiconductor vias.

Segmenting the wafer into thinned and bulk regions maintains mechanical strength while enhancing charge collection efficiency.

A memory device configuration featuring a stacked body with a metal-containing region reduces operating current through band offset formation.

Wafer-level initialization of resistive random access memory cells reduces process complexity and cost while ensuring functional die identification.

An evaporation method generates charged luminous particles guided by an electric field to deposit material uniformly on array substrates.

Segmented local and global bitlines route signals to remote sense amplifiers, reducing parasitic capacitance while maintaining signal integrity.

Placing the getter on the external surface simplifies production by avoiding complex localized deposition inside the sealed structure.

Variable thickness in the inorganic insulating layer disperses stress during substrate distortion, preventing wire cracks and disconnections.

A wearable OLED device uses a down-conversion layer to re-emit near-infrared light from visible electroluminescence.

Segmented bonding regions with distinct materials protect interconnection lines while maintaining sufficient contact area for robust device reliability.

Slit channels isolate polysilicon layers around vias to reduce parasitic capacitance in memory devices.

Dual adhesive layers with varying peel strengths enable easy module replacement while maintaining strong bonding for compact displays.

Protective coatings shield polysilicon side walls from oxidation, maintaining electrical characteristics while increasing integration density.

Transition layer with higher etching rate forms upward-opening angle at via hole edges in GOA region.