Vertical Channel Memory Charge Isolation via Recess Etching

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional vertical channel type nonvolatile memory devices face reliability issues due to charge migration among adjoining memory cells, which affects threshold voltage cycling characteristics and data retention, especially when using charge storage layers like polysilicon where charges can freely migrate.

Innovation Solution

The method involves forming a trench with recesses on the substrate, applying a charge blocking layer, and then a charge storage layer, followed by an anisotropic etching process to separate the charge storage layers of each memory cell, ensuring they are isolated from one another, thereby preventing charge migration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If charge storage layers like polysilicon are used to store data, then data storage capability is improved, but charge migration among adjoining memory cells occurs causing reliability deterioration

Engineering Contradiction:
Improvedata storage capabilityVSAvoidmemory device reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent divides the continuous charge storage layer into separate, isolated segments for each memory cell by forming recesses in the tunnel dielectric layer. These recesses physically separate the charge storage layers of adjacent memory cells, preventing charge migration while maintaining data storage capability in each cell.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediate structure (recesses in the tunnel dielectric layer) between adjacent charge storage layers. This intermediate structure acts as a barrier that prevents direct charge migration between cells while allowing each cell to maintain its charge storage function.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If conventional fabrication methods are used, then manufacturing process is simple, but charge storage layers of adjoining memory cells are connected allowing charge migration

Engineering Contradiction:
Improvefabrication process simplicityVSAvoidcharge isolation between cells
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent performs preliminary action by forming recesses in the tunnel dielectric layer before forming the charge storage layer. This preliminary structuring ensures that when the charge storage material is deposited, it naturally forms isolated segments in each recess, preventing charge migration from the outset.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies local quality by creating regions with different properties: the recesses have different dielectric characteristics compared to the surrounding tunnel dielectric layer. This local variation in dielectric quality ensures charge confinement within each memory cell while maintaining overall structural integrity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of the memory device by reducing charge migration and allowing the use of conductive layers like polysilicon for data storage without compromising the memory cells' operation.

Implementation Method 1

conducting an anisotropic etching process, portions of the charge storage layer which are formed on inner surfaces of the trench excluding the recesses are removed

Methodology Applied
Scientific EffectAnisotropic etching:

Implementation Method 2

oxidizing the exposed portions of the charge storage layer, portions of the charge storage layer which are respectively formed in the recesses are separated from one another

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS8519471B2Vertical channel type nonvolatile memory device and method for fabricating the same
Publication Date: 2013.08.27 SK HYNIX INC
  • US8519471B2 patent drawing
  • US8519471B2 patent drawing
  • US8519471B2 patent drawing

AI summary

A method for fabricating a vertical channel type nonvolatile memory device includes forming alternately a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, forming a trench having a plurality of recesses on a surface of the trench by etching the plurality of interlayer dielectric layers and a plurality of conductive layers, wherein the plurality of recesses are formed at a certain interval on the surface of the trench, forming a charge blocking layer over a plurality of surfaces of the plurality of recesses, forming a charge storage layer over the charge blocking layer for filling a plurality of the remaining recesses with a charge storage material, forming a tunnel dielectric layer to cover the charge storage layer, and forming a vertical channel layer by filling the remaining trench.