Sacrificial Layer for Semiconductor Wafer Backside Stripping

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Solution Overview

Problem

Current semiconductor processing methods face challenges in efficiently removing undesirable layers from the backside of wafers without damaging the front-side structures, particularly due to stress imbalance leading to warpage, and the use of aggressive chemistries that pose health and safety risks.

Innovation Solution

The implementation of a sacrificial layer on the front-side of semiconductor wafers allows for batch processing to remove undesirable backside layers using less aggressive chemistries, with the sacrificial layer being deposited and later removed, enabling the use of single-wafer tools for specific layers and reducing wafer deformation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If batch processing is used to remove backside layers, then processing efficiency is improved, but aggressive chemistries damage front-side structures

Engineering Contradiction:
Improveprocessing efficiencyVSAvoiddamage to front-side structures
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

A sacrificial layer is deposited on the front-side of the wafer to act as a protective intermediary during batch processing. This sacrificial layer is selectively removed after the backside layers are stripped, allowing aggressive chemistries to be used without damaging the actual front-side structures. The sacrificial layer mediates between the need for efficient batch processing and the need to protect vulnerable front-side features.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If aggressive chemistries are used to remove backside layers, then removal rate is improved, but health and safety risks increase

Engineering Contradiction:
Improveremoval rateVSAvoidhealth and safety risks
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The sacrificial layer serves as a mediator that allows the use of aggressive chemistries for high-speed removal of backside layers. By providing a protective barrier on the front-side, it enables the use of fast-acting chemistries that would otherwise be too dangerous, thus achieving high removal rates while maintaining acceptable health and safety standards.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If backside layers are removed to reduce wafer warpage, then manufacturing precision is improved, but additional processing steps are required

Engineering Contradiction:
Improvewafer flatnessVSAvoidnumber of processing steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The sacrificial layer is deposited in advance before the backside layer removal process. This preliminary action enables the subsequent batch processing to proceed without worrying about front-side protection, as the sacrificial layer is already in place. The preliminary deposition simplifies the overall process by pre-establishing the protective mechanism.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The sacrificial layer is intentionally discarded after serving its protective function during backside layer removal. Its temporary nature allows it to be removed along with or after the backside layers, simplifying the process by eliminating the need for complex protection and restoration steps on the front-side structures.

Inventive Principle:
Principle #34Discarding and recovering

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively reduces wafer deformation, protects vulnerable front-side structures, and avoids the use of extremely aggressive chemistries, improving processing efficiency and safety while maintaining the quality of semiconductor devices.

Implementation Method 1

immersing the semiconductor wafer in phosphoric acid for a first time period thereby removing a first silicon nitride layer from a backside

Methodology Applied
Scientific EffectChemical etching:

Implementation Method 2

immersing the semiconductor wafer in dilute hydrofluoric acid for a second time period thereby removing the first sacrificial silicon oxide layer

Methodology Applied
Scientific EffectChemical etching:

Data Source

PatentUS11205575B2Method for stripping one or more layers from a semiconductor wafer
Publication Date: 2021.12.21 TEXAS INSTRUMENTS INC
  • US11205575B2 patent drawing
  • US11205575B2 patent drawing
  • US11205575B2 patent drawing

AI summary

A method of forming an integrated circuit includes forming a first layer having a first material type over a first side of a semiconductor wafer. A second layer having a second different material type is removed from a second opposing side of the semiconductor wafer using a first process that removes the second material type at a greater rate than the first material type. Subsequent to removing the second layer, the first layer is removed using a second different process.