Sample-and-Hold Circuit Resistance Tuning for Aliasing Control
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Solution Overview
Problem
Existing circuit assemblies and detection devices face challenges in time-discretizing analog electrical signals from radar modules under pulsed energy supply, leading to issues with aliasing and signal processing due to the limitations of low-pass filters in adapting to settling time and cut-off frequency.
Innovation Solution
The integration of a series resistance with the capacitor in the sample and hold circuit to form a low-pass filter, allowing for adjustable cut-off frequency and reduced signal distortion, thereby attenuating high-frequency signal portions and mitigating aliasing effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a low-pass filter is used to prevent aliasing in the sample and hold circuit, then aliasing effects are reduced, but the filter cannot adapt to settling time and cut-off frequency requirements under pulsed energy supply
Solution Approach 1:
The patent applies the dynamics principle by making the cut-off frequency of the low-pass filter adjustable and adaptable to different operating conditions. The filter's cut-off frequency is set to a value between 1/(2*Tsettle) and 1/(2*Tsample), allowing it to dynamically adapt to different settling times and sampling periods, thereby resolving the contradiction between reliable aliasing reduction and adaptability to varying time parameters.
2Use of energy by moving object
If the radar module is supplied with electrical energy in clocked manner to reduce energy consumption, then energy consumption is reduced, but additional measures are required for time-discretization and low-pass filtering
Solution Approach 1:
The patent merges the time-discretization function and the low-pass filtering function into a single integrated sample and hold circuit. This combination eliminates the need for separate filtering components, reducing device complexity while maintaining energy efficiency through clocked supply of the radar module.
Solution Approach 2:
The sample and hold circuit is designed to perform multiple functions simultaneously: time-discretization of the analog signal and low-pass filtering to prevent aliasing. This multi-functionality reduces the overall system complexity and component count while maintaining energy-efficient operation under pulsed supply conditions.
3Reliability
If the maximum frequency of the analog electrical sensor signal is limited to half of the sampling rate, then digital signal processing problems are avoided, but the low-pass filter with fixed cut-off frequency cannot adapt to different sampling rates
Solution Approach 1:
The patent implements a dynamic low-pass filter with an adjustable cut-off frequency that can be adapted to different sampling rates. The cut-off frequency is set within the range of 1/(2*Tsettle) to 1/(2*Tsample), allowing the filter to automatically adjust its characteristics based on the sampling rate, thereby maintaining reliable digital signal processing across varying operating conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables effective reduction of aliasing effects and signal distortion, allowing for reliable digital signal processing while reducing energy consumption by optimizing the low-pass function and cut-off frequency, thus improving the overall performance of the circuit assembly and detection devices.
Implementation Method 1
a sample and hold circuit (30) comprising a capacitor (34) connected to the output terminal (20)
Implementation Method 2
an electronic switching unit (36) connected between the input terminal (18) and the output terminal (20)
Implementation Method 3
the switching unit (36) is formed to provide an electrical resistance (28) in the on-state, which cooperates with the capacitor (34)
Data Source
AI summary
There is provided a circuit assembly for time-discretizing an analog electrical signal, including an input terminal supplying the analog electrical signal, an output terminal providing a time-discrete signal depending on the supplied analog electrical signal and a sample and hold circuit, which comprises a capacitor connected to the output terminal, an electronic switching unit connected between the input terminal and the output terminal and a control unit controlling the switching unit, wherein the switching unit provides an off-state due to an off-signal of the control unit and an on-state due to an on-signal of the control unit, wherein the switching unit provides an electrical resistance in the on-state, which cooperates with the capacitor and comprises a preset resistance value, such that the sample and hold circuit provides a low-pass with preset cut-off frequency. There is further provided a detection device and lighting device with such a circuit assembly.