Sample and Hold Circuit Using Dual Capacitor Segmentation for High Voltage Sampling
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Solution Overview
Problem
Sample and hold circuits face challenges in efficiently sampling voltage differences that exceed the maximum tolerance voltage of their components, particularly when these voltages are outside the supply rails, which can lead to component damage.
Innovation Solution
The circuit operates in two modes, using first and second capacitors to sample and hold voltage differences referenced to different supply voltages, allowing it to handle high voltages beyond the component tolerance without damage by referencing the sampled voltage difference to either Vdd or Vss, thereby keeping the output within the supply voltage rails.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the sample and hold circuit samples voltage differences outside the supply rails, then the circuit can handle high voltage signals, but the component tolerance voltage is exceeded causing potential damage
Solution Approach 1:
The voltage sampling process is segmented into two distinct phases: a first mode where the first capacitor samples the voltage difference between the input node and first reference voltage, and a second mode where the second capacitor samples the voltage difference between the input node and second reference voltage. This segmentation allows each capacitor to operate within safe voltage ranges while collectively covering the full input voltage range beyond supply rails.
Solution Approach 2:
The circuit dynamically switches between two operating modes based on the input voltage conditions. The controller selectively activates either the first mode or second mode, changing the reference voltage assignment between Vdd and Vss. This dynamic adaptation enables the circuit to handle varying input voltages safely by adjusting the sampling configuration in real-time.
2Reliability
If the circuit uses components with higher voltage tolerance to handle high voltages, then component damage is prevented, but the circuit becomes more expensive and larger
Solution Approach 1:
The circuit changes the reference voltage parameter dynamically between Vdd and Vss depending on the operating mode. By changing this parameter, the same physical capacitors can safely measure voltage differences relative to different references, effectively extending the measurable voltage range without requiring components rated for higher voltages.
Solution Approach 2:
The controller acts as an intermediary that manages the switching between reference voltages. Instead of using expensive high-voltage-rated capacitors directly, the controller mediates the sampling process by selectively connecting capacitors to appropriate reference voltages, protecting the capacitors from exceeding their voltage ratings while still enabling high-voltage signal sampling.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the sampling of high voltages without damaging circuit components, allowing for the use of smaller and less expensive components and ensuring the output can be processed by analog-to-digital converters within the supply voltage rails.
Implementation Method 1
a first capacitor is used to sample a voltage difference between an input node and a first reference voltage
Implementation Method 2
the second capacitor is used to hold an output at a voltage indicative of a previously sampled voltage difference
Data Source
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AI summary
Aspects of various embodiments of the present disclosure are directed to applications utilizing voltage sampling. In certain embodiments, a sample and hold circuit is configured to sample voltages that exceed a tolerance voltage of components. The circuit includes a first and a second capacitors. In a first mode, a voltage difference between an input node and a first reference voltage is sampled using the first capacitor. Also in the first mode, a voltage stored by the second capacitor is referenced to a second reference voltage and provided to a first output node. In a second mode, a voltage difference between an input node and a first reference voltage is sampled using the second capacitor. Also in the second mode, a voltage stored by the first capacitor is referenced to the second reference voltage and provided to a second output node.