Sample-and-Hold Circuit Charge Injection Noise Reduction
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Solution Overview
Problem
Typical sample-and-hold circuit implementations in image sensing devices suffer from inaccuracies due to stray capacitances and stray charges, which are not effectively addressed in existing technologies, leading to noise issues that impact precision.
Innovation Solution
A sample-and-hold circuit design incorporating a first transistor, a second transistor connected between the gate and drain electrode, a sampling capacitor, and a first current source, with a gate control circuit that generates a gate control signal to minimize noise by ensuring the gate voltage is set at a minimum voltage of Vth2+Vsat2+Vth1+Vsat1, optimizing the operation of the circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a typical sample-and-hold circuit implementation is used, then the circuit structure is simple, but charge injection noise and inaccuracies occur due to stray capacitances and stray charges
Solution Approach 1:
The circuit is divided into distinct functional blocks: a first transistor for charge transfer, a second transistor for controlled discharge, and a sampling capacitor. This segmentation allows each component to address specific noise sources independently, improving sampling accuracy without creating a monolithic complex structure.
Solution Approach 2:
The harmful stray charges and capacitances are extracted and redirected through the second transistor to a dedicated discharge path. By separating the charge discharge function from the signal sampling function, the circuit eliminates noise injection into the sampling node while maintaining structural organization.
2Reliability
If the gate control signal voltage is increased to ensure proper transistor operation, then transistor switching reliability improves, but charge injection noise increases
Solution Approach 1:
The second transistor acts as an intermediary between the gate control signal and the sampling capacitor. It mediates the charge transfer process by providing a controlled discharge path that prevents direct injection of excessive charges into the sampling node, thus maintaining reliable switching while reducing noise.
Solution Approach 2:
The gate control signal, which inherently generates charge injection when driving the first transistor, is converted from a harmful noise source into a beneficial control mechanism. The second transistor recovers and redirects these injected charges to a discharge path, transforming the harmful effect into a controlled process that maintains switching reliability without contaminating the sampling signal.
Data Source
AI summary
A sample-and-hold circuit includes a first transistor; a second transistor disposed between a gate electrode and a drain electrode of the first transistor; a sampling capacitor, an electrode of the sampling capacitor being connected to the gate electrode of the first transistor; and a first current source connected to the drain electrode of the first transistor, where a gate electrode of the second transistor receives a gate control signal. A minimum voltage of the gate control signal is Vth2+Vsat2+Vth1+Vsat1, where Vth1 is a threshold voltage of the first transistor, Vsat1 is a saturation voltage of the first transistor, Vth2 is a threshold voltage of the second transistor, and Vsat2 is a saturation voltage of the second transistor.