Switched-Capacitor Sampling Circuit With Input Charge Compensation

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Solution Overview

Problem

Conventional switched capacitor sampling circuits using input buffer amplifiers introduce noise and offset voltages, increase current consumption, and require more space due to the need for high input impedance, which degrades noise performance and increases power usage.

Innovation Solution

A circuit arrangement that uses charge-storing elements and switching means to compensate for current flow during sampling, eliminating the need for input buffer amplifiers by charging and discharging capacitors to restore charge to the input nodes, thereby reducing noise injection and current consumption while canceling out differential and common mode input currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If input buffer amplifiers are used to achieve high input impedance, then input impedance is improved, but noise and offset voltages are introduced into the sampled voltage

Engineering Contradiction:
Improveinput impedanceVSAvoidnoise and offset voltages
Core Design Contradiction:
Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

The patent removes the input buffer amplifiers from the conventional switched capacitor sampling circuit, extracting the harmful noise and offset voltage sources while maintaining high input impedance through an alternative charge compensation mechanism using switching means and charge-storing elements

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces switching means and charge-storing elements as intermediary components that mediate between the input signal and the sampling capacitor, enabling charge compensation without requiring buffer amplifiers, thus avoiding noise introduction while maintaining high input impedance

Inventive Principle:
Principle #24Intermediary (Mediator)

2Stability of the object's composition

If input buffer amplifiers are used to achieve high input impedance, then input impedance is improved, but current consumption is increased

Engineering Contradiction:
Improveinput impedanceVSAvoidcurrent consumption
Core Design Contradiction:
Stability of the object's compositionVSUse of energy by moving object

Solution Approach 1:

The patent extracts the current-consuming buffer amplifier stage from the circuit, replacing it with a switching-based charge compensation mechanism that achieves high input impedance without the continuous current draw of operational amplifiers

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs periodic switching action of the switching means to transfer charge to and from the charge-storing elements, achieving high input impedance through time-averaged charge compensation rather than continuous current supply, thereby reducing power consumption

Inventive Principle:
Principle #19Periodic action

3Stability of the object's composition

If input buffer amplifiers are used to achieve high input impedance, then input impedance is improved, but space requirement is increased

Engineering Contradiction:
Improveinput impedanceVSAvoidspace requirement
Core Design Contradiction:
Stability of the object's compositionVSArea of stationary object

Solution Approach 1:

The patent removes the bulky buffer amplifier circuitry from the design, replacing it with compact switching means and charge-storing elements that occupy significantly less silicon area while achieving the same high input impedance function

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the functions of input buffering and charge compensation into a single integrated switching mechanism, eliminating the need for separate buffer amplifier circuits and reducing overall circuit area

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces noise, current consumption, and space requirements while maintaining performance by compensating for current flow without the need for input buffer amplifiers, achieving noise reduction and efficient operation.

Implementation Method 1

a sampling capacitor means (Cs) and a first switching means (S1, S2, S3, S4) being switchable between a first switching state and a second switching state. The first switching means is coupled to the sampling capacitor means, the first input node and the first output node in such a way that the sampling capacitor means is conductively connected to the first input node and disconnected from the first output node in the first switching state and the sampling capacitor means is disconnected from the first input node and conductively connected to the first output node in the second switching state

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

A first charge-storing element is coupled via a second switching means to the first input node in such a way that the charge-storing element is charged in the first switching state and discharged in the second switching state, thereby at least partly compensating current flow from the first input node for charging the sampling capacitor means in the first switching state

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentEP3432470B1A circuit arrangement and a method for operating a circuit arrangement
Publication Date: 2020.12.23 AUSTRIAMICROSYSTEMS AG
  • EP3432470B1 patent drawingFigure 1~2
  • EP3432470B1 patent drawingFigure 3
  • EP3432470B1 patent drawingFigure 4A~4B

AI summary

A circuit arrangement comprises a first input node (11), a first output node (21), a sampling capacitor means (Cs, Cs1, Cs2) and a first switching means being switchable between a first switching state and a second switching state. The first switching means is coupled to the sampling capacitor means (Cs, Cs1, Cs2), the first input node (11) and the first output node (21) in such a way that the sampling capacitor means (Cs, Cs1, Cs2) is conductively connected to the first input node (11) and disconnected from the first output node (21) in the first switching state and the sampling capacitor means (Cs, Cs1, Cs2) is disconnected from the first input node (11) and conductively connected to the first output node (21) in the second switching state. A first charge-storing element is coupled via a second switching means to the first input node (11) in such a way that the charge-storing element is charged in the first switching state and discharged in the second switching state, thereby at least partly compensating current flow for charging the sampling capacitor means (Cs, Cs1, Cs2) in the first switching state.