Switched-Capacitor Sampling Circuit With Input Current Compensation
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Solution Overview
Problem
Conventional switched capacitor sampling circuits with input buffer amplifiers introduce noise and offset voltages, increase current consumption, and require more space due to the need for high input impedance, while partial sampling methods require faster buffers and do not fully cancel common mode input current.
Innovation Solution
A circuit arrangement that uses a sampling capacitor and charge-storing elements with switching means to compensate current flow, eliminating the need for input buffer amplifiers by restoring charge during the non-sampling phase and compensating differential and common mode input currents, thereby reducing noise and current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If input buffer amplifiers are used to achieve high input impedance, then input impedance is improved, but noise and offset voltages are introduced
Solution Approach 1:
The patent extracts and removes the input buffer amplifiers from the circuit, eliminating the source of noise and offset voltages. The high input impedance function is achieved directly through the switched capacitor circuit design without requiring buffer amplifiers, thereby taking out the harmful component while preserving the desired electrical characteristic.
Solution Approach 2:
The patent converts the potentially harmful effect of input current draw into a beneficial feature by designing the switched capacitor circuit to naturally accommodate the current requirements. The circuit uses the input current to charge the sampling capacitor during the sampling phase, transforming what would be a harmful load into a functional mechanism that achieves both high input impedance and accurate signal sampling without buffers.
2Stability of the object's composition
If input buffer amplifiers are used to achieve high input impedance, then input impedance is improved, but current consumption is increased
Solution Approach 1:
The patent removes the buffer amplifiers that were the primary source of continuous current consumption. The switched capacitor circuit achieves high input impedance through its switching mechanism and capacitor charging/discharging cycles, eliminating the need for high-power buffer amplifiers and thereby significantly reducing the overall current consumption of the system.
Solution Approach 2:
The patent employs periodic switching action where the sampling capacitor is charged during the sampling phase and discharged during the hold phase. This periodic operation allows the circuit to achieve high input impedance only when needed (during sampling) rather than continuously, reducing average current consumption compared to buffer amplifiers that must maintain high impedance continuously.
3Stability of the object's composition
If input buffer amplifiers are used to achieve high input impedance, then input impedance is improved, but device area is increased
Solution Approach 1:
The patent extracts and eliminates the buffer amplifier blocks from the circuit architecture. By removing these large-area components, the overall device area is significantly reduced. The high input impedance function is achieved through the more area-efficient switched capacitor circuit, which uses small capacitors and switches instead of large buffer amplifier transistors.
Solution Approach 2:
The patent uses a simplified switched capacitor approach that copies the essential high-impedance function without requiring the complex buffer amplifier structure. The sampling capacitor and switching network replicate the input impedance characteristic in a more area-efficient manner, achieving the same electrical performance with fewer and smaller components.
4Object-generated harmful factors
If partial sampling is used to avoid buffer noise, then noise is reduced, but buffer speed requirement is doubled
Solution Approach 1:
The patent removes the buffer amplifiers entirely from the circuit, eliminating the noise problem and simultaneously eliminating the speed requirement for buffers. The high input impedance is achieved through the switched capacitor circuit itself, which does not require any buffering stage, thereby removing both the harmful noise and the performance constraint on buffer speed.
5Device complexity
If conventional switched capacitor sampling is used, then circuit simplicity is maintained, but input impedance is insufficient
Solution Approach 1:
The patent applies preliminary action by pre-charging the sampling capacitor during the sampling phase before the hold phase begins. This preliminary charging action ensures that the input impedance requirement is met during the critical sampling window without requiring additional buffer stages. The capacitor is prepared in advance (during sampling) so that high input impedance is achieved when needed, maintaining circuit simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves noise reduction, space savings, and lower current consumption without performance degradation, effectively canceling out both differential and common mode input currents.
Implementation Method 1
a sampling capacitor means (103) and a first switching means (101, 102, 105, 106) being switchable between a first switching state and a second switching state. The first switching means is coupled to the sampling capacitor means, the first input node and the first output node in such a way that the sampling capacitor means is conductively connected to the first input node and disconnected from the first output node in the first switching state and the sampling capacitor means is disconnected from the first input node and conductively connected to the first output node in the second switching state
Implementation Method 2
A first charge-storing element is coupled via a second switching means to the first input node in such a way that the charge-storing element is charged in the first switching state and discharged in the second switching state, thereby at least partly compensating current flow from the first input node for charging the sampling capacitor means in the first switching state
Data Source
AI summary
A circuit arrangement comprises a first input node, a first output node, a sampling capacitor means and a first switching means being switchable between a first switching state and a second switching state. The first switching means is coupled to the sampling capacitor means, the first input node and the first output node in such a way that the sampling capacitor means is conductively connected to the first input node and disconnected from the first output node in the first switching state and the sampling capacitor means is disconnected from the first input node and conductively connected to the first output node in the second switching state. A first charge-storing element is coupled via a second switching means to the first input node in such a way that the charge-storing element is charged in the first switching state and discharged in the second switching state, thereby at least partly compensating current flow for charging the sampling capacitor means in the first switching state.