Sampling Circuit for Memory Row Hammer Mitigation
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Solution Overview
Problem
The row hammering phenomenon in semiconductor memory devices leads to data loss due to high activation rates of specific word lines, necessitating a target refresh operation to prevent data damage.
Innovation Solution
A semiconductor device and memory device incorporating a sampling circuit that randomly samples input signals using a sampling control circuit generating first to third sampling control signals, allowing for the selection of coarse and fine sections within a sampling period to maximize randomization and address periodicity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single pattern signal is used for sampling, then the circuit complexity is reduced, but the randomization effect is insufficient and periodicity remains
Solution Approach 1:
The sampling period is divided into multiple coarse sections, and each coarse section is further divided into multiple fine sections. This segmentation allows different pattern signals to operate at different granularity levels, achieving better randomization while maintaining manageable circuit complexity through hierarchical organization.
Solution Approach 2:
The patent implements a nested structure where fine sections are nested within coarse sections. Multiple pattern signals operate at different nesting levels - the first pattern signal selects coarse sections while the second pattern signal selects fine sections within each coarse section. This nested approach maximizes randomization effectiveness without linearly increasing circuit complexity.
2Reliability
If multiple pattern signals operating at different periods are used, then the randomization is maximized and periodicity is eliminated, but the device complexity increases
Solution Approach 1:
The patent employs multiple dynamically operating pattern signals with different periods. The first pattern signal operates at a coarser period while the second pattern signal operates at a finer period within each coarse period. This dynamic multi-period operation eliminates periodicity in the sampling sequence while the modular signal generation keeps complexity manageable.
Solution Approach 2:
The patent uses periodic pattern signals with different periods to drive the sampling process. The first pattern signal has a longer period for coarse section selection, while the second pattern signal has a shorter period for fine section selection. This multi-periodic action ensures comprehensive coverage of all sections while eliminating single-periodicity, achieving high randomization through controlled periodic operations.
3Ease of manufacture
If the entire sampling range is covered uniformly, then the manufacturing precision is simplified, but the sampling accuracy for specific sections is reduced
Solution Approach 1:
The patent implements local quality by providing different sampling resolutions for different sections. Coarse sections provide broader coverage with lower resolution, while fine sections within selected coarse sections provide higher resolution sampling. This local differentiation optimizes sampling accuracy for specific target sections while maintaining efficient overall circuit implementation through selective high-resolution sampling.
Data Source
AI summary
A semiconductor device includes: a sampling control circuit configured to select a coarse section from a plurality of coarse sections according to a first pattern signal during a sampling period, select a fine section from a plurality of fine sections according to a second pattern signal during the selected coarse section, and generate first to third sampling control signals having activated sections defined by the selected coarse section and the selected fine section; and a sampling circuit configured to sample an input address according to the first to third sampling control signals, respectively, to generate first to third sampling addresses, and schedule the first to third sampling addresses according to a sampling signal defining the sampling period to output an output address.