Programmable Sampling Delay Circuit for Image Sensor Noise Avoidance
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Solution Overview
Problem
Image sensor devices face noise contamination in sample signals due to switching events, with existing solutions either being costly, power-intensive, or ineffective in eliminating substrate noise.
Innovation Solution
A programmable delay circuit and controller system that adjusts the sampling signal delay to avoid noisy events, using a switch, capacitor, and latch configuration to produce a delayed sampling signal, allowing for flexible delay settings based on capacitance and current variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If digital circuits are removed from the image sensor IC and placed in a separate IC, then power supply noise is reduced, but signal routing complexity and cost increase
Solution Approach 1:
The patent segments the sampling process into two distinct phases: a first sampling instant for capturing the reset voltage and a second sampling instant for capturing the video voltage. This temporal segmentation allows the sampling to occur at different times, avoiding simultaneous switching noise while keeping all digital circuits integrated on the same IC. The segmented sampling approach resolves the contradiction by reducing power supply noise through timing separation without requiring separate ICs or complex external routing.
2Object-affected harmful factors
If active power supply driving is used to eliminate power supply noise, then noise is reduced, but power consumption increases significantly
Solution Approach 1:
The patent applies preliminary action by performing the reset voltage sampling at a first instant before the video voltage sampling at a second instant. This preliminary sampling of the reset voltage allows the correlated double sampling process to subtract out the power supply noise component from the subsequent video voltage measurement. By preparing and capturing the reference reset voltage in advance at a different time, the system eliminates power supply noise without requiring high-power active driving circuits.
3Object-affected harmful factors
If separate power and ground nets are implemented for digital and analog circuitry, then power supply noise is reduced, but system complexity and cost increase
Solution Approach 1:
The patent extracts the power supply noise component from the video signal through the correlated double sampling process. By sampling the reset voltage (which contains the power supply noise) at a first instant and the video voltage (which contains both the signal and power supply noise) at a second instant, and then subtracting the first sample from the second, the power supply noise is extracted and removed. This extraction approach eliminates noise without requiring separate power and ground nets, thereby avoiding the associated complexity.
4Measurement precision
If sampling occurs at two separate instants for reset and video voltage, then correlated double sampling can be performed, but power supply noise may be added during the transition
Solution Approach 1:
The patent creates a copy of the power supply noise by sampling the reset voltage at a first instant when no switching events are occurring. This first sample serves as a copy of the noise component that will be present in the video voltage sample taken at a second instant. By having this noise copy available, the system can subtract it from the video voltage sample to remove the noise, thereby maintaining measurement precision without being affected by power supply noise during the transition between sampling instants.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively prevents noise in sample signals by synchronizing sampling with the absence of noisy events, reducing power consumption and complexity, and providing a cost-effective solution for minimizing power supply noise.
Implementation Method 1
The delay circuit is configured to delay the sampling signal by selected lengths of time based on a selected one of a plurality of different delay lengths
Implementation Method 2
The delay circuit comprises a switch, a capacitor and a latch
Data Source
AI summary
A delay circuit is provided that delays the sampling signal by a selected amount in order to ensure that sampling does not occur concurrently with the occurrence of a noisy event. The noisy events on the IC tend to be periodic and occur at regular intervals. The invention allows the delay in the sampling signal to be adjusted such that sampling does not occur at the same time as the reoccurring noisy event. This ensures that the sample signals will not have noise in them resulting from the occurrence of the noisy event. In addition, the delay circuit is programmable to allow the amount of delay to be set on the fly.