Sampling Phase Determination With Reduced Oversampling Rate

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High sampling rates required in wireless communication devices for bandwidth communication systems lead to increased hardware costs and power consumption, which is undesirable for low-cost, handheld devices.

Innovation Solution

Sampling the received signal at a period of T+m*(T/n) during the sampling phase determination process, where T is the symbol or chip period, n is the number of phases, and m is a fixed non-zero integer, reduces the need for oversampling, thereby decreasing the sampling rate and associated costs and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If oversampling is used to determine sampling phase, then sampling phase accuracy is improved, but hardware cost and power consumption increase

Engineering Contradiction:
Improvesampling phase accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies partial oversampling by selecting a reduced set of sample phases (e.g., 4 phases instead of traditional 8-16 phases) during sampling phase determination. This partial action approach maintains sufficient accuracy for phase detection while reducing the number of samples taken, thereby lowering power consumption and hardware requirements compared to full oversampling methods.

Inventive Principle:
Principle #16Partial or excessive action

2Measurement precision

If oversampling is used to determine sampling phase, then sampling phase accuracy is improved, but hardware cost increases

Engineering Contradiction:
Improvesampling phase accuracyVSAvoidhardware cost
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent reduces hardware complexity by implementing partial oversampling with a smaller number of phases (e.g., 4 phases). This requires fewer correlators, less memory, and simpler digital signal processing hardware compared to traditional oversampling approaches, while still achieving adequate sampling phase determination accuracy for wireless communication.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If high sampling rate is used, then signal recovery accuracy is improved, but power consumption increases

Engineering Contradiction:
Improvesignal recovery accuracyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent uses partial oversampling at a reduced sampling rate with fewer phases during phase determination, then transitions to normal sampling at the optimal phase. This partial action strategy maintains signal recovery accuracy by correctly identifying the sampling phase while reducing power consumption during the phase determination period compared to continuous high-rate oversampling.

Inventive Principle:
Principle #16Partial or excessive action

4Reliability

If high sampling rate is used, then signal recovery accuracy is improved, but hardware cost increases

Engineering Contradiction:
Improvesignal recovery accuracyVSAvoidhardware cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements partial oversampling with a reduced number of phases during sampling phase determination, which lowers the sampling rate requirement. This reduces the specifications and cost of analog-to-digital converters, correlators, and other hardware components while still achieving adequate signal recovery accuracy through proper phase identification.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8345731B2Methods and apparatus for reducing a sampling rate during a sampling phase determination process
Publication Date: 2013.01.01 MALIKIE INNOVATIONS LTD
  • US8345731B2 patent drawing
  • US8345731B2 patent drawing
  • US8345731B2 patent drawing

AI summary

Control circuitry is configured to control a sampler, in a sampling phase determination process, to sample a signal at a sampling period of T±T/n for outputting a sample set for each one of n phases of the sampled signal. Each one of n correlators has a first input configured to receive one of the sample sets, a second input configured to receive a PN signal, and an output which provides a correlation result from a correlation process between the sample set and the PN signal. The control circuitry is further configured to identify, from the correlation results, one of the phases associated with the optimal correlation result. The control circuitry is then configured to control the sampler, in a communication mode, to sample a received signal at a sampling period of T at the phase associated with the optimal correlation result.