SAR ADC Bit Switching With Low-Voltage Conversion for Lower Power
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional high-voltage SAR ADCs face high power consumption due to dynamic power associated with level-shifting of digital control signals, large bit switches for fast signal settling, and inefficiencies in signal attenuation methods, leading to increased chip area and signal distortion.
Innovation Solution
The implementation of a high-voltage switched capacitor circuit with low-voltage conversion switches and level-shifting circuits that generate high-voltage signals to control coupling of sampling switches, reducing the need for high-voltage switches and minimizing power consumption by using low-voltage transistors for VREF and GND switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high-voltage switches are used for sampling and switching during successive approximation operation, then fast signal settling is achieved, but dynamic power consumption increases due to level-shifting of digital control signals
Solution Approach 1:
The bit switching circuit is segmented into two independent parts: a first switching circuit for sampling the high-voltage analog input signal and a second switching circuit for switching during successive approximation operation. This segmentation allows each circuit to be optimized independently, with the second circuit using low-voltage switches to reduce power consumption while the first circuit maintains high-voltage capability for fast settling.
Solution Approach 2:
A voltage conversion switch circuit is introduced as an intermediary between the high-voltage sampling switch and the low-voltage conversion switch. This intermediary enables the high-voltage signal to be converted to low-voltage for processing by low-power switches, thereby reducing dynamic power consumption while maintaining signal integrity.
2Speed
If bit switches are made very large to achieve low channel resistances, then fast signal settling is achieved, but integrated circuit area increases
Solution Approach 1:
The invention changes the voltage parameter of the switching circuit from high-voltage to low-voltage for the conversion switches. Low-voltage transistors have smaller dimensions and lower capacitance compared to high-voltage transistors, enabling faster switching speeds with significantly reduced channel resistance and smaller area occupation.
3Use of energy by moving object
If resistive divider circuit is used to attenuate high-voltage analog input signal, then high-voltage switches are avoided, but input impedance decreases and power consumption increases
Solution Approach 1:
A voltage conversion switch circuit serves as an intermediary that converts the high-voltage sampled signal to low-voltage without requiring a resistive divider. This approach maintains high input impedance characteristics while avoiding the power consumption and impedance degradation issues associated with resistive attenuation circuits.
4Use of energy by moving object
If capacitive divider circuit is used to attenuate high-voltage input signal, then high-voltage switches are avoided for conversion operation, but signal-to-noise ratio deteriorates and additional die area is required
Solution Approach 1:
The switching system is segmented into high-voltage sampling switches for initial signal acquisition and low-voltage conversion switches for subsequent digital-to-analog conversion operations. This segmentation eliminates the need for capacitive dividers, thereby preserving signal-to-noise ratio while reducing power consumption and die area.
Data Source
AI summary
A switched capacitor circuit, which may be an SAR ADC, includes a plurality of bit switching circuits (33) each including a high-voltage sampling switch circuit (18) having a first terminal (28) coupled to a first terminal of a corresponding capacitor (22) and a second terminal coupled to receive an analog input signal (VSIG). A third terminal of the sampling switch circuit is coupled to an intermediate conductor (19). Each switching circuit (33) also includes a low-voltage conversion switch circuit (30) coupled to the intermediate conductor (19) and a combinational logic circuit (12) applying low-voltage signals to the conversion switch circuit and a level-shifting circuit (16) that generates corresponding high-voltage signals (HV_SIG_DRV) which control coupling of the first terminal (28) to the analog input signal and the intermediate conductor.


