SAR ADC Capacitor Array Reconfiguration for Wider Dynamic Range
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Solution Overview
Problem
The dynamic range of Successive Approximation Analog-to-Digital Converters (SAR ADCs) needs to be expanded without increasing the reference voltage, as current methods require higher power consumption to achieve this.
Innovation Solution
The proposed solution involves a capacitor array and logic circuit configuration where the lower electrode plates of capacitors are connected to either a reference voltage or ground voltage, allowing the first comparison voltage to approximate a second comparison voltage, thereby expanding the dynamic range without altering the reference voltage, utilizing the charge conservation law to maintain equivalent charge amounts at sampling and conversion stages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the reference voltage is increased to expand the dynamic range of the SAR ADC, then the dynamic range is improved, but the power consumption increases
Solution Approach 1:
The capacitor array is divided into multiple groups (first capacitor array and second capacitor array) with different connection configurations. By selectively connecting different groups to reference voltage or ground voltage based on the input signal range, the circuit achieves extended dynamic range without requiring a single high-voltage reference, thereby avoiding increased power consumption.
Solution Approach 2:
The circuit dynamically switches between different capacitor array configurations depending on the input signal voltage range. When the input signal is within the first voltage range, the first capacitor array connects to reference voltage; when within the second voltage range, the second capacitor array connects to ground voltage. This dynamic reconfiguration allows the ADC to adapt to different signal ranges without changing the reference voltage magnitude, maintaining low power consumption while expanding dynamic range.
2Measurement precision
If the reference voltage value is changed to expand the dynamic range, then the dynamic range is improved, but the circuit complexity increases
Solution Approach 1:
The same capacitor arrays are used for multiple purposes: they serve both as the primary conversion elements and as the mechanism for extending dynamic range. By changing the connection configuration of existing capacitors (connecting to reference voltage or ground voltage) rather than adding separate circuits, the design achieves dynamic range expansion without proportionally increasing circuit complexity.
Solution Approach 2:
The patent combines the dynamic range extension function with the existing capacitor array structure. Instead of adding separate high-voltage reference circuits or additional conversion stages, the invention merges the dynamic range adaptation capability into the existing capacitor switching mechanism, thereby achieving extended functionality with minimal increase in circuit complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively expands the dynamic range of the ADC without increasing power consumption, allowing for accurate analog-to-digital conversion within a broader input voltage range without changing the reference voltage.
Implementation Method 1
utilizing the charge conservation law to maintain equivalent charge amounts at sampling and conversion stages
Data Source
AI summary
An analog-to-digital conversion circuit and method are provided. At a sampling stage, the first capacitor array connects lower electrode plates of N capacitors to a first input voltage, connect lower electrode plates of the other capacitors to a common-mode voltage, and connect upper electrode plates of all the capacitors to the common-mode voltage to sample the first input voltage; in an ith conversion at a conversion stage, the logic circuit controls, the lower electrode plate of an ith capacitor to connect to a reference voltage or a ground voltage, a first comparison voltage output by the first capacitor array approximates a second comparison voltage; and the comparator stores a comparison result between the first and the second comparison voltage to an i+1th flag bit in the logic circuit, and analog-to-digital conversion is completed when i+1 is equal to the total number of capacitors in the first capacitor array.