SAR ADC Global Delay Calibration for PVT-Stable Conversion Timing
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Solution Overview
Problem
Existing SAR ADCs face accuracy issues due to process, voltage, and temperature variations, which require frequent recalibration, increasing system cost and complexity, and result in truncated bits or insufficient settling time.
Innovation Solution
The ADC performs iterative self-calibration of global delay in bit-conversion circuits, ensuring conversion time meets a target within a specified period, using a feedback loop and control logic that adjusts the global delay based on historical references and environmental changes, allowing for asynchronous SAR analog-to-digital conversion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the time delay or conversion time in the feedback loop is increased to allow sufficient settling time for accurate conversion, then the measurement precision is improved, but the productivity decreases because the conversion period becomes longer and some bits may be truncated
Solution Approach 1:
The patent implements dynamic adjustment of the time delay parameter based on environmental conditions (temperature, supply voltage, reference voltage, clock characteristics). The system transitions from a static fixed delay to a dynamic adaptive delay that optimizes the balance between settling time and conversion speed in real-time, resolving the contradiction between accuracy and speed
Solution Approach 2:
The system changes the time delay parameter adaptively based on PVT (process, voltage, temperature) variations and other environmental factors. By adjusting this critical parameter dynamically, the system maintains optimal conversion accuracy while maximizing conversion speed under different operating conditions
2Productivity
If the time delay is decreased to increase conversion speed and prevent bit truncation, then the productivity is improved, but the measurement precision deteriorates due to insufficient settling time
Solution Approach 1:
The system uses dynamic adjustment of the time delay parameter based on environmental conditions. Instead of using a fixed conservative delay that limits speed, the system adapts the delay dynamically to be as short as possible while still providing sufficient settling time, thus maximizing conversion speed without sacrificing accuracy
Solution Approach 2:
The system incorporates feedback mechanisms that monitor conversion results and environmental conditions to continuously optimize the time delay parameter. This feedback loop ensures the delay is adjusted to achieve the fastest possible conversion speed while maintaining the minimum required settling time for accurate results
3Measurement precision
If production trimming is performed on capacitors to reduce quantization errors, then the measurement precision is improved, but the device complexity and manufacturing cost increase
Solution Approach 1:
The system performs self-calibration using software algorithms that automatically compensate for capacitor variations without requiring external trimming equipment or complex manufacturing processes. The ADC self-adjusts its calibration parameters based on measured errors, eliminating the need for manual or automated production trimming
Solution Approach 2:
The system changes calibration parameters through software rather than through physical capacitor trimming. By adjusting digital calibration parameters and compensation factors, the system achieves high quantization accuracy without the complexity and cost of physical trimming operations
4Measurement precision
If frequent recalibration is performed to maintain accuracy under PVT variations, then the measurement precision is maintained, but the productivity and system complexity increase
Solution Approach 1:
The system implements periodic self-calibration at predetermined intervals or under specific triggering conditions rather than continuous recalibration. This periodic approach maintains accuracy under PVT variations while minimizing the impact on productivity by limiting calibration operations to necessary moments
Solution Approach 2:
The system performs automatic self-calibration without requiring external intervention or complex recalibration procedures. The self-calibration feature continuously maintains accuracy under varying conditions while keeping the system simple and efficient by eliminating the need for external calibration equipment or manual intervention
Data Source
AI summary
An analog-to-digital converter (ADC) is described. This ADC includes a conversion circuit with multiple bit-conversion circuits. During operation, the ADC may receive an input signal. Then, the conversion circuit may asynchronously perform successive-approximation-register (SAR) analog-to-digital conversion of the input signal using the bit-conversion circuits, where the bit-conversion circuits to provide a quantized representation of the input signal. For example, the bit-conversion circuits may asynchronously and sequentially perform the SAR analog-to-digital conversion to determine different bits in the quantized representation of the input signal. Moreover, the ADC may selectively perform self-calibration of a global delay of the bit-conversions circuits. Note that the timing self-calibration may be iterative and subject to a constraint that a maximum conversion time is less than a target conversion time.