SAR ADC Comparison Result Storage for High-Speed Calibration
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Solution Overview
Problem
Analog-to-digital conversion circuits with SAR ADC mechanisms often require additional calibration to produce correct digital output signals, and at high operating frequencies, the conversion results can be overwritten before calibration is complete, leading to incorrect digital outputs.
Innovation Solution
An analog-to-digital conversion apparatus and method that incorporates a data storage mechanism to store comparison results generated by the conversion circuit. This allows for digital error correction to be performed in sufficient time, enabling the apparatus to operate at high speeds without errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the operating frequency of the analog-to-digital conversion circuit is increased to improve conversion speed, then the productivity is improved, but the conversion result may be replaced by the next conversion result before calibration is finished, causing the digital output signal to be incorrect
Solution Approach 1:
The patent stores the conversion result immediately after generation in a storage circuit before calibration is performed. This preliminary storage action ensures that the original conversion result is preserved and not lost when the calibration process takes time, allowing high-speed operation without data loss
Solution Approach 2:
A storage circuit is introduced as an intermediary component between the conversion circuit and the calibration circuit. This storage circuit acts as a buffer that temporarily holds the conversion result, decoupling the timing requirements of the fast conversion process from the slower calibration process
2Manufacturing precision
If the calibration process is performed on the converted result to generate the correct digital output signal, then the manufacturing precision is improved, but the conversion result may be replaced by the next conversion result before calibration is finished
Solution Approach 1:
The conversion result is stored in advance in the storage circuit before the calibration process begins. This preliminary storage ensures that even though calibration takes time, the original data remains available and不会被 overwritten by subsequent conversion operations
Solution Approach 2:
The patent separates the conversion process and calibration process into distinct operational stages. The storage circuit is specifically dedicated to holding conversion results during the calibration stage, allowing these two processes to operate at different speeds without interfering with each other
Data Source
AI summary
The present disclosure discloses an analog-to-digital conversion apparatus having a data storage mechanism that includes an analog-to-digital conversion (ADC) circuit having a conversion circuit, a comparison result storage circuit and a calibration circuit. The conversion circuit includes a capacitor array circuit, a comparison circuit and a capacitor control circuit. The capacitor array circuit, corresponding to a sampling stage of a conversion process, receives an analog input voltage to perform capacitor-switching operation to generate analog output voltages. The comparison circuit sequentially generates comparison results according to the analog output voltages. The capacitor control circuit controls the capacitor array circuit to perform capacitor-switching operation according to the comparison results by using successive-approximation register mechanism. The comparison result storage circuit stores the comparison results. The calibration circuit retrieves the comparison results to perform digital error correction to generate a digital output signal.