SAR ADC Comparator Stopping for Noise-Resilient Low-Power Conversion
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Solution Overview
Problem
Successive approximation type A/D conversion circuits face challenges in achieving high precision and low power consumption while accurately determining the relationship between differential analog signals, particularly due to noise influences and inconsistencies in comparison results from multiple comparison circuits.
Innovation Solution
The circuit employs a configuration with multiple comparison circuits connected to capacitor circuits with weighted capacitance values, a determination circuit to count states, and a control circuit to generate digital signals indicating comparison results, allowing for accurate bit determination and power-efficient operation by stopping comparison circuits when the difference between state counts is minimal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple comparison circuits are used to improve measurement precision, then reliability of comparison results improves, but power consumption increases
Solution Approach 1:
The patent implements dynamic control of comparison circuits by selectively activating or deactivating individual comparison circuits based on real-time signal conditions. The control circuit monitors the differential signal and determines which comparison circuits are necessary for accurate conversion, powering down unnecessary circuits to reduce power consumption while maintaining measurement precision when needed.
Solution Approach 2:
The patent applies different operational states to different comparison circuits based on their specific function and the current signal characteristics. Instead of uniformly operating all comparison circuits, the system adjusts the operational state of each comparison circuit locally according to its role in the conversion process and the instantaneous requirements of the differential signal being converted.
2Measurement precision
If multiple comparison circuits operate continuously to ensure accurate bit determination, then conversion precision improves, but power consumption increases
Solution Approach 1:
The patent implements periodic activation of comparison circuits synchronized with the successive approximation process. Comparison circuits are activated only during specific conversion cycles when bit determination is required, and deactivated during idle periods. This periodic operation maintains conversion precision when needed while significantly reducing average power consumption compared to continuous operation.
Solution Approach 2:
The control circuit autonomously manages the power states of comparison circuits based on the conversion progress and signal characteristics. The system self-regulates by monitoring its own operational state and automatically activating or deactivating comparison circuits according to the current conversion requirements, eliminating the need for external control while optimizing power usage.
3Reliability
If all comparison circuits operate to handle noise influences, then reliability of conversion improves, but device complexity increases
Solution Approach 1:
The patent prepares comparison circuits for selective activation based on anticipated signal conditions and noise characteristics. The control circuit pre-determines which comparison circuits will be needed based on the differential signal range and expected noise levels, activating only the necessary subset of circuits before conversion begins. This preliminary planning reduces the need for complex real-time control while maintaining noise resilience.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the accuracy of A/D conversion and reduces power consumption by accurately determining signal relationships and controlling the comparison process based on state counts, improving noise resilience and operational efficiency.
Implementation Method 1
The first capacitor circuit includes a plurality of first capacitors having weighted capacitance values. A first analog signal is input to the first capacitor circuit. The second capacitor circuit includes a plurality of second capacitors having weighted capacitance values. A second analog signal is input to the second capacitor circuit.
Implementation Method 2
The plurality of comparison circuits compare a potential of the first output node with a potential of the second output node, and output a first digital signal.
Data Source
AI summary
A successive approximation type A/D conversion circuit includes a first capacitor circuit, a second capacitor circuit, a plurality of comparison circuits, a determination circuit, and a control circuit. The determination circuit counts a first number of first state and a second number of second state with respect to a plurality of first digital signals output from the plurality of comparison circuits. The determination circuit outputs a control signal for stopping the plurality of comparison circuits to the control circuit when an absolute value of a difference between the first number and the second number is equal to or smaller than 1. The control circuit stops the plurality of comparison circuits on the basis of the control signal.