SAW Resonator Structure for Suppressing Substrate Spurious Currents
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Solution Overview
Problem
Surface acoustic wave (SAW) resonators experience RF losses due to spurious currents caused by inversion channels formed in high-resistivity monocrystalline silicon substrates, leading to non-linear behavior and intermodulation distortion, which deteriorate their performance.
Innovation Solution
A SAW resonator device is designed with a semiconductor substrate having a surface region with high trap density and reduced carrier mobility, and a piezoelectric layer with a polarization axis oriented at an angle relative to the substrate, using rare-earth doped aluminum nitride and an oxide layer to reduce spurious currents and improve linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a high-resistivity monocrystalline silicon substrate is used, then RF losses due to substrate currents are reduced, but inversion channels form due to charges in other layers, causing spurious currents and RF losses
Solution Approach 1:
An oxide layer is introduced as an intermediary between the piezoelectric layer and the semiconductor substrate. This oxide layer acts as a physical barrier that prevents charge carriers from being injected into the inversion layer, thereby eliminating spurious currents while allowing the high-resistivity substrate to maintain its low substrate current losses
Solution Approach 2:
The harmful inversion channel formation process is extracted and prevented by removing the direct electrical connection between the piezoelectric layer charges and the substrate. The oxide layer effectively extracts or blocks the charge injection pathway, preventing the formation of spurious current paths
2Ease of manufacture
If a piezoelectric layer with C-axis perpendicular to the substrate is used, then standard SAW resonator structure is achieved, but spurious currents and intermodulation distortion occur
Solution Approach 1:
The orientation parameter of the piezoelectric layer's polarization axis is changed from perpendicular (0°) to at an angle (45° or other angles) relative to the substrate surface. This parameter change modifies the electric field distribution and charge carrier behavior, preventing inversion channel formation while maintaining acceptable manufacturing complexity
Solution Approach 2:
The oxide layer is applied locally at the interface between the piezoelectric layer and substrate, providing targeted protection against charge injection only where needed, without affecting the overall structure or requiring changes to other parts of the device
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly reduces spurious RF currents and intermodulation distortion, enhancing the linearity and performance of SAW resonators by trapping free charge carriers and preventing the formation of inversion channels.
Implementation Method 1
a piezoelectric layer disposed over the substrate, the piezoelectric layer having a first surface and a second surface, wherein a polarization axis (C-axis) of the piezoelectric layer is oriented at an angle in the range of approximately 0° to approximately 45° relative to a plane of the substrate
Implementation Method 2
a semiconductor substrate having a first surface and a second surface, the semiconductor substrate comprising a bulk region and a surface region wherein the surface region has a high trap density and a reduced carrier mobility compared to the bulk region
Data Source
AI summary
A surface acoustic wave (SAW) resonator device is disclosed. The SAW resonator has a piezoelectric layer disposed over a semiconductor substrate. The piezoelectric layer has a first surface and a second surface. The polarization axis (C-axis) of the piezoelectric layer is oriented at an angle relative to the second surface of the piezoelectric layer in a range of approximately 0° to approximately 45°. A layer is disposed between the first surface of the semiconductor substrate and the second surface of the piezoelectric layer.