Switched-Capacitor Converter Frequency Control for Light-Load Ripple
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Solution Overview
Problem
Switched-capacitor power converters experience significant output voltage ripple and reduced efficiency under light load conditions due to large parasitic inductance and capacitance, leading to excessive voltage ringing and inefficient charge transfer.
Innovation Solution
The system monitors load conditions and adjusts the maximum switching frequency of the clock signal using feedback comparators and frequency dividers, reducing output voltage ripple and improving efficiency by controlling the frequency based on load demands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the maximum switching frequency is maintained high under light load conditions, then the response speed and regulation capability are improved, but the output voltage ripple increases and conversion efficiency decreases
Solution Approach 1:
The patent implements dynamic frequency adjustment by modifying the clock signal generation mechanism. The switched-capacitor converter transitions from a fixed maximum frequency to a variable frequency operation where the clock signal frequency is dynamically adjusted based on load conditions. This is achieved through modifying the control circuitry that generates clock signals to the switch network, enabling the system to operate at optimal frequencies for different load scenarios, thereby improving efficiency during light loads while maintaining adequate response speed when needed.
Solution Approach 2:
The patent changes the frequency parameter of the clock signal based on detected load conditions. By monitoring load current or power consumption and adjusting the clock frequency accordingly, the system optimizes the switching frequency to match actual demand. This parameter adjustment reduces unnecessary high-frequency switching under light loads, decreasing output voltage ripple and improving conversion efficiency while preserving the capability to operate at higher frequencies when load demands require faster response.
2Loss of energy
If the maximum switching frequency is reduced under light load conditions, then the output voltage ripple and energy loss are reduced, but the response speed and regulation capability deteriorate
Solution Approach 1:
The control system dynamically adjusts the clock frequency based on real-time load detection. When light load conditions are detected, the frequency is reduced to improve efficiency and reduce ripple. When load conditions change or regulation is needed, the frequency can be increased rapidly. This dynamic adaptation resolves the contradiction by making the frequency responsive to actual system needs rather than being statically optimized for one condition.
Solution Approach 2:
The patent incorporates feedback mechanisms that monitor load conditions and use this information to adjust the clock frequency. The control circuitry detects load current or power consumption levels and feeds this information back to the clock signal generation mechanism. This closed-loop control ensures that the switching frequency is continuously optimized based on actual operating conditions, preventing both excessive frequency (which wastes energy) and insufficient frequency (which compromises response capability).
3Device complexity
If a fixed maximum frequency is used for the clock signal, then the circuit design is simpler, but the output voltage ripple increases under light load and efficiency is reduced
Solution Approach 1:
The patent introduces dynamic frequency adjustment capability while maintaining relatively simple circuit architecture. The modification involves adjusting the clock signal generation mechanism to enable variable frequency operation based on load conditions. This dynamic feature is integrated into the existing switched-capacitor converter structure without requiring fundamentally complex additional circuitry, thus achieving improved efficiency with minimal increase in design complexity.
Solution Approach 2:
The control circuitry automatically detects load conditions and self-adjusts the clock frequency without external intervention. The system monitors its own operating parameters (load current or power consumption) and autonomously modifies the switching frequency to optimize performance. This self-service capability eliminates the need for complex external control systems while achieving adaptive frequency adjustment that reduces ripple and improves efficiency under varying load conditions.
Data Source
AI summary
A device comprises a first comparator to generate a first clock signal based on a reference voltage and a first voltage at an output of a switched-capacitor power converter (SCPC), and a second comparator to generate a first control signal based on the first voltage and a threshold voltage. A sensor is to generate a second control signal based on one of a level of a current of the first clock signal, or a duty cycle of the first clock signal. A frequency divider circuit is to generate a second clock signal based on the first control signal and the second control signal, and in some embodiments, further based on one of the first clock signal or a third clock signal. Controller circuitry is to operate switch circuitry of the SCPC based on the first clock signal.