Scalable Subspace Tracking Architecture for Real-Time Signal Processing
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Solution Overview
Problem
Current subspace tracking algorithms, such as PAST and FST, lack real-time implementation capabilities and accuracy, particularly in handling nonstationary signals and interference in applications like communications, radar, and sonar, with FAST algorithms not having clear computational architectures that scale with the rank and size of the subspace.
Innovation Solution
A real-time subspace tracking device and method utilizing the FAST algorithm, comprising computational blocks for Project Vector, Residual Vector, Outer Product, and Singular Vector Decomposition, which scale with the rank and size of the subspace, enabling efficient tracking of principal singular values and vectors in nonstationary noise environments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If PAST algorithms are used for subspace tracking, then basic arithmetic computations are employed, but the desired level of accuracy is not provided
Solution Approach 1:
The patent combines multiple computational blocks (Project Vector, Residual Vector, Outer Product, SVD) into an integrated architecture that achieves both computational efficiency and high accuracy. This merging of functional blocks allows the system to maintain the simplicity of basic arithmetic operations while achieving superior tracking accuracy through coordinated computation across all blocks.
Solution Approach 2:
The patent divides the subspace tracking algorithm into distinct computational blocks (Project Vector block, Residual Vector block, Outer Product block, SVD block), each handling a specific aspect of the computation. This segmentation allows for optimized implementation of each block while maintaining overall system accuracy and enabling parallel processing capabilities.
2Productivity
If FST algorithm is used, then subspace tracking is performed, but eigenvalues or singular values are not estimated
Solution Approach 1:
The patent implements a multi-functional architecture where the computational blocks serve multiple purposes: they enable fast subspace tracking while simultaneously estimating eigenvalues and singular values. The SVD block specifically provides eigenvalue estimation capability, making the system universal in handling both speed requirements and information extraction needs.
3Measurement precision
If FAST algorithm is used, then superior speed and accuracy are achieved, but clear computational architecture is not available
Solution Approach 1:
The patent provides architectural clarity by segmenting the FAST algorithm into four well-defined computational blocks with clear interfaces and data flow: Project Vector block, Residual Vector block, Outer Product block, and SVD block. This segmentation makes the complex algorithm implementable and understandable while preserving its superior accuracy and speed characteristics.
4Adaptability or versatility
If subspace tracking is implemented in real-time, then nonstationary signals are handled, but computational complexity increases
Solution Approach 1:
The patent implements dynamic adaptation by using the Residual Vector block to continuously assess the match between subspace estimates and current signal observations. This dynamic feedback mechanism allows the system to adapt to nonstationary signals in real-time, adjusting the subspace estimates as needed while managing computational complexity through efficient block operations.
Solution Approach 2:
The patent performs preliminary computations in the Project Vector block by pre-calculating projections of signal observations onto the current subspace estimates. This preliminary action reduces the computational burden of subsequent operations, enabling real-time processing of nonstationary signals while controlling overall system complexity.
5Productivity
If computational blocks scale with rank and size of subspace, then efficiency is improved, but device size increases
Solution Approach 1:
The patent implements dynamic scaling where the size and complexity of each computational block adapt to the actual rank and dimension of the subspace being tracked. This dynamic allocation ensures that computational resources are efficiently utilized - blocks scale up when needed for accuracy and efficiency, and scale down when the subspace is smaller, optimizing the trade-off between device size and computational efficiency.
Data Source
AI summary
A real-time implementation of a subspace tracker is disclosed. Efficient architecture addresses the unique computational elements of the Fast Approximate Subspace Tracking (FAST) algorithm. Each of these computational elements can scale with the rank and size of the subspace. One embodiment of architecture described is implemented in digital hardware that performs variable rank subspace tracking using the FAST algorithm. In particular, the FAST algorithm is effectively implemented by a few processing elements, coupled with an efficient Singular Vector Decomposition (SVD), and the realization/availability of high density programmable logic devices. The architecture enables the ability to track the possibly changing dimension of the signal subspace.