Dynamically-Partitioned Scan Chains for Test-Per-Clock Efficiency
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Solution Overview
Problem
Existing scan-based testing methods, such as test-per-scan and conventional test-per-clock schemes, are inefficient in terms of testing time and power consumption, with the test-per-scan scheme requiring excessive clock cycles for shifting and the test-per-clock scheme leading to excessive circuit toggling and power dissipation.
Innovation Solution
A test-per-clock scheme utilizing dynamically-partitioned reconfigurable scan chains that operate in three modes: shifting-launching, capturing-compacting-shifting, and mission modes, allowing for efficient test pattern application and response compaction every clock cycle, reducing power consumption by minimizing unnecessary scan chain activity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If test-per-scan scheme is used, then test patterns can be applied to circuit-under-test, but excessive clock cycles are required for shifting operations
Solution Approach 1:
The scan chains are made dynamically reconfigurable, allowing them to switch between different operational modes (shifting-launching, capturing-compacting-shifting, and mission modes) based on test requirements. This dynamic configuration enables the system to perform launch-capture operations every clock cycle rather than requiring separate shift cycles, thereby reducing total test time while maintaining test pattern application capability
Solution Approach 2:
The scan chains are designed to perform multiple functions within a unified structure. They can simultaneously serve as test pattern launchers, test response captors, and compactors, eliminating the need for separate dedicated shift operations. This multi-functionality allows the same hardware resources to be utilized for both pattern application and response collection in every clock cycle
2Use of energy by stationary object
If shifting clock frequency is reduced for power concerns, then power consumption is reduced, but test time for data loading and unloading increases
Solution Approach 1:
The system maintains continuous useful action by performing launch-capture operations every clock cycle without requiring separate shift phases. The scan chains continuously launch test patterns and capture responses in an uninterrupted manner, eliminating idle shift time. This continuous operation allows the use of higher clock frequencies for actual testing while minimizing the time spent on data transfer operations
3Productivity
If conventional test-per-clock scheme is used, then test patterns can be applied every clock cycle, but excessive circuit toggling occurs leading to high power dissipation
Solution Approach 1:
Different portions of the scan chains are assigned different operational qualities based on local requirements. Some scan chains operate in shifting-launching mode for pattern application, others in capturing-compacting-shifting mode for response collection, and many remain in mission mode for normal circuit operation. This localized functional assignment ensures that only necessary portions of the circuit toggle actively, reducing overall power dissipation while maintaining high test productivity
4Productivity
If scan chains are reconfigured dynamically, then test efficiency is improved, but device complexity increases
Solution Approach 1:
The scan chains are segmented into distinct functional segments that can be independently configured and controlled. Each segment can be assigned to a specific operational mode based on test requirements, allowing granular control over resource allocation. This segmentation simplifies the reconfiguration process by enabling independent management of different scan chain portions rather than requiring system-wide reconfiguration
Data Source
AI summary
Aspects of the invention relate to a test-per-clock scheme based on dynamically-partitioned reconfigurable scan chains. Every clock cycle, scan chains configured by a control signal to operate in a shifting-launching mode shift in test stimuli one bit and immediately applies the newly formed test pattern to the circuit-under-test; and scan chains configured by the control signal to operate in a capturing-compacting-shifting mode shift out one bit of previously compacted test response data while compacting remaining bits of the previously compacted test response data with a currently-captured test response to form currently compacted test response data. A large number of scan chains may be configured by the control signal to work in a mission mode. After a predetermined number of clock cycles, a different control signal may be applied to reconfigure and partition the scan chains for applying different test stimuli.