Scheduled Traffic Timing for Cross-Domain EDA Emulation
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Solution Overview
Problem
Existing EDA test environments face challenges in implementing scheduled traffic generation and transmission due to the lack of a defined timing interface between network traffic generation platforms and EDA emulators operating in different timing domains, making it difficult to test designs according to standards like IEEE 802.1Qbv.
Innovation Solution
A method and system for scheduled traffic generation in EDA test environments that involve a test controller receiving parameters, computing a traffic launch timestamp in the EDA emulator timing domain, and communicating this timestamp to the EDA emulator to ensure transmission aligns with specified timing boundaries, using precision time protocol (PTP) synchronization and hardware timestamps to synchronize components across different domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If scheduled traffic generation is implemented in EDA test environments, then testing compliance with standards like IEEE 802.1Qbv is improved, but the complexity of the system increases due to the need for timing synchronization between different domains
Solution Approach 1:
The patent introduces a timing interface and synchronization mechanism as an intermediary between the network traffic generation platform and the EDA emulator. This intermediary translates timestamps between different timing domains (PTP domain and emulator domain) and coordinates traffic launch timing, thereby enabling scheduled traffic generation without directly coupling the two systems. The timing interface acts as a mediator that resolves the complexity of cross-domain synchronization while ensuring reliable compliance testing.
2Measurement precision
If a timing interface is defined between network traffic generation platform and EDA emulator, then scheduled traffic transmission precision is improved, but the device complexity increases due to additional synchronization components
Solution Approach 1:
The patent implements a timing interface that copies and translates timestamp information between different timing domains. Instead of creating complex real-time synchronization mechanisms, the system captures timestamp data from the PTP domain, copies it to the emulator domain with appropriate translation, and uses this copied timing information to schedule traffic transmission. This copying approach achieves precise traffic transmission timing while avoiding the complexity of direct real-time synchronization between domains.
3Stability of the object's composition
If PTP synchronization is used to synchronize components across different domains, then timing alignment is improved, but the ease of operation decreases due to the need for manual configuration of synchronization parameters
Solution Approach 1:
The timing interface is designed to automatically perform timestamp translation and traffic launch scheduling without requiring manual configuration of synchronization parameters. The system self-services by automatically establishing the timing relationship between PTP domain and emulator domain, dynamically calculating traffic launch timestamps based on received PTP timestamps, and adjusting for any timing domain differences. This automation maintains stable timing alignment while eliminating the need for operators to manually configure complex synchronization parameters.
Data Source
AI summary
A method for scheduled traffic generation in an EDA test system includes receiving, by a test controller, at least one parameter associated with a scheduled transmission of emulated network traffic to an electronics design under test. The method further includes receiving, by the test controller and from an EDA test platform, a timestamp TO in an EDA emulator timing domain. The method further includes computing, based on the timestamp TO in the EDA emulator timing domain and the at least one parameter, a traffic launch timestamp in the EDA emulator timing domain and communicating the traffic launch timestamp and at least one test packet to the EDA emulator. The method further includes receiving, from the EDA emulator, an indication as to whether the EDA emulator successfully initiated transmission of the at least one test packet to an electronics design under test at a time indicated by the traffic launch timestamp.