Scoreboard Configuration for Microprocessor Data Location

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Solution Overview

Problem

The increasing size of re-order buffers (ROB) and future files in microprocessor architecture leads to resource-intensive data dependency management, causing bottlenecks in clock frequency and power consumption, while downstream reservation stations require large data widths, further exacerbating resource intensity.

Innovation Solution

Implementing a scoreboard configuration that directs microprocessors to the location of required data, eliminating the need for resource-intensive checks across multiple locations, reducing hardware and power costs by eliminating the future file and removing duplicated data storage, and optimizing the early reservation stations to handle data location information efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the re-order buffer size is increased to handle more instructions, then the ability to manage out-of-order instructions is improved, but the access time and resource consumption increase significantly

Engineering Contradiction:
Improveability to handle out-of-order instructionsVSAvoidaccess time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent divides the large re-order buffer into multiple smaller sets, where each set is managed by a separate scoreboard. This segmentation allows parallel access to different portions of the buffer, reducing the time required to check data dependencies while maintaining the ability to handle a large number of out-of-order instructions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces scoreboards as intermediary structures between the re-order buffer and the execution units. Each scoreboard maintains a compact representation of data dependency information for its associated buffer set, acting as a mediator that provides quick dependency checks without requiring direct access to the entire large buffer.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If the future file size is increased to hold more speculative data, then the ability to rapidly access speculative data is improved, but the resource consumption and access complexity increase

Engineering Contradiction:
Improvedata access speedVSAvoidfuture file complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent extracts the data dependency tracking function from the future file structure and implements it separately through scoreboards associated with the re-order buffer. This separation allows the future file to remain compact while still providing rapid access to speculative data, as the dependency information is now maintained in the streamlined scoreboard structures rather than within the future file itself.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If the reservation station data width is increased to hold complete source operand data, then the ability to process instructions is improved, but the resource consumption and processing overhead increase

Engineering Contradiction:
Improveinstruction processing capabilityVSAvoidprocessing resource consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent uses scoreboards to maintain compact copies of data dependency information rather than storing complete source operand data in the reservation stations. The scoreboards hold condensed metadata that indicates the location and validity of data in the re-order buffer, allowing reservation stations to process instructions efficiently without requiring large data widths, thus reducing energy consumption and resource usage.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10552158B2Reorder buffer scoreboard having multiple valid bits to indicate a location of data
Publication Date: 2020.02.04 MIPS HLDG INC
  • US10552158B2 patent drawing
  • US10552158B2 patent drawing
  • US10552158B2 patent drawing

AI summary

Various embodiments of a microprocessor include a scoreboard implementation that directs the microprocessor to the location of data values. For example, the scoreboard may include individual bits that instruct the microprocessor to retrieve the data from a re-order buffer, retire queue, result bus, or register file. As a first step, the microprocessor receives an instruction indicating a process that requires data from one or more source registers. Instead of automatically retrieving the data from the register file, which is a costly process, the microprocessor may read the scoreboard to determine whether the needed data can be more cost-effectively retrieved from the re-order buffer, retire queue, or result busses. Therefore, the microprocessor can avoid costly data retrieval procedures. Additionally, the scoreboard implementation enables the microprocessor to handle limited out-of-order instructions, which improves overall performance of the microprocessor.