SCR ESD Protection Structure With Higher Holding Voltage
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Solution Overview
Problem
Existing electrostatic discharge (ESD) protection circuits in integrated circuits, particularly those using silicon-controlled rectifiers (SCRs), face challenges in effectively managing ESD currents and maintaining a stable holding voltage, leading to potential damage from unpredictable ESD events.
Innovation Solution
A semiconductor substrate structure with specific well configurations and doping patterns is created, including a deep well, drift wells, body wells, and doped regions, which form a symmetrical unidirectional ESD protection device with a parasitic vertical silicon-controlled rectifier and bipolar junction transistor, enhancing breakdown voltage and current dissipation capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional silicon-controlled rectifier (SCR) is used in an ESD protection circuit, then the device can conduct ESD current to ground, but the holding voltage remains insufficient and the device may fail to effectively protect sensitive integrated circuit devices during high current ESD events
Solution Approach 1:
The SCR structure is segmented into multiple functional regions including a first conductivity type drift well, a second conductivity type deep well, a third conductivity type body well, and a fourth conductivity type counter doped region. This segmentation allows each region to perform specific functions in managing ESD current and voltage, thereby improving overall protection effectiveness while controlling holding voltage.
Solution Approach 2:
Different regions within the SCR are doped with specific conductivity types and concentrations to create localized electrical properties. The drift well is doped to manage voltage distribution, the deep well provides current conduction path, the body well controls triggering characteristics, and the counter doped region adjusts holding voltage. This local quality optimization enables the device to simultaneously achieve high ESD protection effectiveness and appropriate holding voltage levels.
2Reliability
If the SCR structure is optimized to increase holding voltage, then protection effectiveness improves, but the device complexity increases due to additional wells and dopant configurations
Solution Approach 1:
Multiple functional wells (drift well, deep well, body well) and doped regions are merged into a single integrated SCR structure formed within the semiconductor substrate. This unified structure achieves complex voltage and current control functions through coordinated interaction of the combined elements, rather than requiring separate discrete components for each function.
Solution Approach 2:
The SCR structure employs nested doping configurations where the deep well is formed within the drift well, the body well is formed within the deep well, and the counter doped region is formed within the body well. This nested arrangement creates a compact, multi-functional structure that achieves high holding voltage and effective ESD protection without excessive lateral or vertical expansion, thereby managing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure effectively clamps and dissipates ESD currents, increasing the holding voltage and failure current, thereby protecting integrated circuits from high-voltage ESD events by utilizing a PNPN and NPN layered stack configuration.
Implementation Method 1
An ESD event refers to an unpredictable electrical discharge of a positive or negative current over a short duration and during which a large amount of current is directed to the integrated circuit
Implementation Method 2
a protection device of the protection circuit is triggered to enter a low-impedance state that conducts the ESD current to ground and shunts the ESD current away from the integrated circuit
Data Source
AI summary
Structures for an electrostatic discharge device including a silicon-controlled rectifier and methods of forming a structure for an electrostatic discharge device that includes a silicon-controlled rectifier. The structure includes a first well in a semiconductor substrate, a second well and a third well in the first well, and a fourth well in the first well. The first well has a first conductivity type, and the second well and the third well have the first conductivity type. The fourth well positioned in a lateral direction between the second well and the third well, and the fourth well has a second conductivity type opposite to the first conductivity type. The second well, the third well, and the fourth well are positioned in a vertical direction between the first well and a top surface of the semiconductor substrate.