SCR ESD Protection Circuit Using External Tap Resistor
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Solution Overview
Problem
Existing electrostatic discharge (ESD) protection circuits in integrated circuits face challenges due to the capacitance of silicon controlled rectifiers (SCRs), which can impact input/output (I/O) operations.
Innovation Solution
The proposed ESD protection circuit incorporates a silicon controlled rectifier (SCR) with a first well of a first conductivity type and a first doped region of a second conductivity type, coupled to a first pad, and a first tap region of the first conductivity type, coupled to a second pad through an external resistor. This configuration reduces the capacitance of the SCR.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an SCR is used in the ESD protection circuit, then the IC is protected from ESD events, but the capacitance of the SCR impacts I/O operation
Solution Approach 1:
The SCR structure is segmented into multiple regions including a first well, first doped region, first tap region, second well, second doped region, and second tap region. This segmentation allows different parts of the SCR to serve specific functions, enabling reduced capacitance while maintaining ESD protection capability.
Solution Approach 2:
Different regions of the SCR are doped with different conductivity types (first conductivity type and second conductivity type) to create localized functional zones. The first doped region and first tap region are configured with specific conductivity properties to reduce capacitance, while other regions maintain protection functionality.
2Ease of operation
If the SCR capacitance is reduced to improve I/O operation, then the impact on I/O operation is minimized, but the ESD protection capability may be compromised
Solution Approach 1:
The conductivity types and doping configurations of various SCR regions are carefully controlled to change the electrical parameters of the device. By adjusting the conductivity distribution in the first well, first doped region, and first tap region, the capacitance is reduced while the overall ESD protection capability is preserved through the multi-region structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the capacitance of the SCR, improving I/O operations by minimizing the impact of ESD events on integrated circuits, thereby enhancing the overall reliability and performance of the circuits.
Implementation Method 1
An electrostatic discharge protection (ESD) event refers to a phenomenon of electrical discharge of a current (positive or negative) for a short duration during which a large amount of current is provided to an integrated circuit (IC)
Implementation Method 2
The silicon controlled rectifier may include a first well of a first conductivity type in a substrate, and a first doped region of a second conductivity type and a first tap region of the first conductivity type in the first well
Data Source
AI summary
An electrostatic discharge (ESD) protection circuit includes a silicon controlled rectifier. The silicon controlled rectifier includes a first well of a first conductivity type in a substrate, and a first doped region of a second conductivity type and a first tap region of the first conductivity type in the first well. The second conductivity type has an opposite polarity to the first conductivity type. The first doped region is coupled to a first pad. The first tap region is coupled to a second pad through a resistor external to the silicon controlled rectifier.


