Source/Drain Contact Structure With Isotropic Etching for TDDB Isolation
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Solution Overview
Problem
As semiconductor integrated circuits (ICs) scale down beyond 32 nm, isolation among nearby source/drain (S/D) contacts becomes a concern, leading to potential time-dependent dielectric breakdown (TDDB) failures.
Innovation Solution
The method involves using isotropic etching of the dielectric layer over S/D electrodes, allowing for separate processing of isolated and dense areas on the IC to achieve better control of the etching profile and enhance isolation between S/D contacts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional etching processes are used for S/D contacts, then manufacturing complexity is reduced, but isolation among nearby S/D contacts deteriorates leading to TDDB failure
Solution Approach 1:
The patent divides the etching process into two separate operations: a first etching process that creates initial trenches, and a second etching process that forms final contact holes. This segmentation allows each process to be optimized independently - the first process handles dense areas with standard parameters, while the second process addresses isolated areas with adjusted parameters to achieve proper isolation and prevent TDDB failure.
Solution Approach 2:
The patent introduces dynamic adjustment of etching parameters based on local device density. The process adapts by applying different etching conditions to different regions: dense transistor areas use one set of parameters, while isolated areas use another set. This dynamic approach enables the process to respond to varying local requirements, achieving both good isolation in sparse regions and proper connectivity in dense regions.
2Productivity
If geometry size is scaled down to increase functional density, then production efficiency improves, but isolation among S/D contacts deteriorates
Solution Approach 1:
By segmenting the etching process into two distinct operations, the patent can maintain appropriate contact dimensions and isolation distances even as overall device geometry scales down. The first etching process handles the general trench formation, while the second process fine-tunes the contact holes in isolated areas, ensuring that even at reduced dimensions, sufficient isolation is achieved to prevent TDDB failure.
Solution Approach 2:
The patent applies different etching parameters to different local regions of the wafer. In isolated areas where TDDB risk is higher, the second etching process uses parameters that create larger separation distances. In dense areas where functional density is critical, the process maintains tighter spacing. This local quality approach allows the structure to have different properties in different locations, simultaneously achieving high overall density while maintaining local isolation where needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively increases the distance between adjacent S/D contacts, thereby improving the TDDB performance of semiconductor devices and preventing premature failures.
Implementation Method 1
performing a second etching process to the first area of the first dielectric layer, resulting in a second trench above a first one of the source/drain electrodes, wherein the second etching process includes isotropic etching
Data Source
AI summary
A method includes providing a structure having source/drain electrodes and a first dielectric layer over the source/drain electrodes; forming a first etch mask covering a first area of the first dielectric layer; performing a first etching process to the first dielectric layer, resulting in first trenches over the source/drain electrodes; filling the first trenches with a second dielectric layer that has a different material than the first dielectric layer; removing the first etch mask; performing a second etching process including isotropic etching to the first area of the first dielectric layer, resulting in a second trench above a first one of the source/drain electrodes; depositing a metal layer into at least the second trench; and performing a chemical mechanical planarization (CMP) process to the metal layer.


