SD-LDPC Code Optimization for Burst Errors in 50G-PON Upstream
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Solution Overview
Problem
Existing LDPC codes used in optical transmission systems, such as those specified by the IEEE 802.3ca 25G-Ethernet Passive Optical Network (EPON) working group, face challenges in effectively correcting burst errors in upstream transmission of TDM-PON systems, particularly due to non-uniform error distributions caused by turn-on transients.
Innovation Solution
The proposed solution involves optimizing regular and irregular SD-LDPC codes by employing intra codeword interleaving and parity-check matrix rearrangement. These techniques improve the coding performance under burst-mode errors by redistributing error distributions uniformly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional LDPC codes are used in TDM-PON upstream transmission, then the coding performance is acceptable for standard conditions, but the burst error correction performance deteriorates due to non-uniform error distributions from turn-on transients
Solution Approach 1:
The codeword is divided into multiple segments through intra-codeword interleaving, which separates burst errors into different segments. This allows the error distribution to be more uniform across the codeword, improving burst error correction performance while maintaining compatibility with standard LDPC decoding processes
Solution Approach 2:
The parity-check matrix is rearranged by permuting its columns to change the structure parameters. This rearrangement optimizes the matrix to better handle non-uniform error distributions caused by turn-on transients, thereby improving reliability without requiring additional buffering resources
2Reliability
If intra codeword interleaving and parity-check matrix rearrangement are applied to improve burst error performance, then the BER performance improves by approximately 0.3 dB, but the device complexity increases
Solution Approach 1:
Instead of fundamentally changing the LDPC code structure, the invention modifies existing parameters (parity-check matrix arrangement and interleaving depth) to achieve 0.3 dB improvement. This approach improves reliability while keeping the increase in device complexity minimal and manageable
3Reliability
If optimized SD-LDPC codes are designed for 50G-PON/100G-PON, then the coding performance under burst-mode errors is improved, but the difficulty of detecting and measuring error distributions increases
Solution Approach 1:
The system performs preliminary characterization of burst error patterns from turn-on transients and uses this knowledge to pre-configure the intra-codeword interleaving and parity-check matrix arrangement. This preliminary action simplifies the detection and measurement process during actual operation while maintaining improved coding performance for 50G-PON/100G-PON applications
Data Source
AI summary
The present disclosure relates to systems and methods for FGPA-based burst-error performance and optimization of regular and irregular SD-LDPC codes for 50G-PON/100G-PON and beyond. In particular, the burst-error performance of the regular low-density parity-check (LDPC) code is evaluated and the irregular LDPC code that has been considered for ITU-T's 50G-PON standard via experimental measurements in FPGA. By using intra codeword interleaving and parity-check matrix rearrangement, it is demonstrated that the BER performance can be improved under ˜44-ns-duration burst errors for 50 Gb/s/100 Gb/s upstream signals.