SECDED Error Coding With Burst Error Detection
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Solution Overview
Problem
Existing error detection and correction codes, such as SECDED, are inadequate in detecting burst errors and silent data corruption, which can lead to inaccuracies in error correction and reduced robustness in data transmission.
Innovation Solution
The implementation of a SECDEDBED code that incorporates burst error detection capability by constructing a parity matrix with additional parity bits, optimizing the generator matrix G to minimize silent data corruption and enhance error detection, using a Hamming code structure with specific syndrome code weighting and selection to detect single and double errors, as well as burst errors within an m-bit subset.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional SECDED code is used, then single error correction and double error detection are achieved, but burst error detection capability is insufficient
Solution Approach 1:
The data word is divided into multiple groups, with a subset of m bits selected for enhanced monitoring. This segmentation allows the parity check matrix to specifically target burst error patterns within the m-bit subset while maintaining overall SECDED functionality across the entire data word.
Solution Approach 2:
The patent extends the traditional SECDED code by adding an additional dimension of error detection capability. By incorporating burst error detection into the existing single and double error detection framework, the code transitions from handling only random errors to also detecting correlated burst errors, effectively adding a new dimension to the error detection space.
2Measurement precision
If additional parity bits are added for burst error detection, then error detection accuracy improves, but code complexity increases
Solution Approach 1:
The parity check matrix is designed to perform multiple functions simultaneously: it maintains SECDED capability for single and double bit errors while also providing burst error detection within the m-bit subset. This multi-functionality is achieved through careful selection and weighting of syndrome codes that can identify both random and burst error patterns using the same parity structure.
Solution Approach 2:
The patent modifies the traditional SECDED code by changing specific parameters of the parity check matrix, particularly the weighting and selection of syndrome codes. These parameter changes enable the matrix to detect burst errors without requiring a complete restructuring of the code, thus improving detection accuracy while limiting the increase in complexity to specific matrix configurations rather than overall code architecture.
3Reliability
If syndrome code weighting is optimized to minimize silent data corruption, then data integrity improves, but computational complexity increases
Solution Approach 1:
The syndrome code weighting is optimized locally for the m-bit subset where burst errors are most likely to occur. By concentrating the enhanced detection capability on this specific subset rather than uniformly across all bits, the patent minimizes silent data corruption in the critical region while keeping the overall computational complexity manageable through localized optimization.
Data Source
AI summary
An integrated circuit (IC) device is disclosed. The IC device includes an error encoder to receive a word of k bits and to encode the word using a G-matrix to generate an encoded word of n bits. The n bits include the k bits and n-k check bits. The G matrix is based on a parity check matrix defining a single error correct, double error detect, and burst error detect (SECDEDBED) code. An error decoder receives the encoded word and applies the parity check matrix to the encoded word. The parity check matrix is configured to generate a syndrome from the encoded word. The syndrome being used to detect a random double bit error, a random single bit error, and a burst error of between two and m bits within m adjacent bits of an m-bit subset of the data word starting from an m-bit boundary of the word of k bits, and where m<n-k.