Secure Chip Serial Number Circuits Using Hybrid Lithography
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in creating unique semiconductor chips with unique circuits, as mask-based photolithography is expensive and introduces security risks, while existing maskless lithography methods lack control over design data exposure and interference.
Innovation Solution
The use of a combination of mask-based and maskless lithography systems to create semiconductor chips with common and non-common structures, where non-common structures are formed using maskless lithography, enabling high information storage density and secure unique circuit design, with the ability to store or generate predetermined values like serial numbers or cryptographic keys.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If mask-based photolithography is used to create unique chips, then manufacturing precision can be maintained, but production cost increases and security risks are introduced
Solution Approach 1:
The chip manufacturing process is segmented into two parts: common structures fabricated using mask-based photolithography and unique structures fabricated using maskless lithography. This segmentation allows each method to be applied where it is most effective, resolving the contradiction between precision and cost.
Solution Approach 2:
Different lithography methods are applied to different regions of the chip: mask-based photolithography is used for common structures requiring high precision, while maskless lithography is used for unique structures where cost-effectiveness is prioritized. This local differentiation resolves the contradiction.
2Ease of manufacture
If maskless lithography is used to create unique chips, then production cost is reduced, but control over design data exposure and interference increases
Solution Approach 1:
The design data is segmented into common design data and unique design data. Common design data can be stored and reused, while unique design data is generated and applied individually for each chip using maskless lithography, reducing exposure risks.
Solution Approach 2:
Common structures are fabricated in advance using mask-based photolithography with pre-prepared masks, while unique structures are fabricated immediately before final chip assembly using maskless lithography, minimizing the time that unique design data is exposed.
3Reliability
If unique structures are added to each chip, then chip uniqueness and security are enhanced, but device complexity increases
Solution Approach 1:
The chip structure is segmented into common parts that are identical across multiple chips and unique parts that differ for each chip. This segmentation maintains manageability while achieving uniqueness, resolving the contradiction between security and complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the production of unique semiconductor chips with high information storage density, enhancing security by minimizing exposure of design data and reducing production costs, while maintaining control over the unique circuit design, making it difficult to reverse-engineer the chips.
Implementation Method 1
The maskless system writes patterns onto wafers directly using charged particle beamlets such as electron beamlets
Data Source
AI summary
An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a second portion of the non-common structures is adapted to store or generate a first predetermined value which uniquely identifies the first non-common circuit, wherein the first predetermined value is readable from outside the semiconductor chip by automated reading means.