Secure Memory Test Mode Vector Filtering
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Solution Overview
Problem
Secured memory devices are vulnerable to attacks that exploit their test mode, allowing unauthorized access or modification of sensitive data and disruption of operations, especially over unsecured links.
Innovation Solution
The memory device operates in a testing mode by only writing to a predefined set of test vectors, converting non-matching vectors into valid test patterns, and using one-way functions to encode error information without revealing true error locations, while disabling testing if a secret key is detected.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the memory device operates in test mode allowing writing of arbitrary vectors, then testing flexibility and completeness are improved, but security is worsened because unauthorized data can be written and sensitive information can be accessed or modified
Solution Approach 1:
The patent changes the parameter of writable data from arbitrary vectors to a restricted set of predefined test vectors. The memory device checks whether incoming write data matches a predefined test vector, and only allows writing if it matches. This parameter change restricts the testing space but eliminates security vulnerabilities by preventing unauthorized data writing.
Solution Approach 2:
The patent creates copies of essential test functionality using a limited set of predefined test vectors. Instead of allowing all possible test data, a small set of representative test vectors is designed to cover essential testing scenarios. This copying approach maintains testing effectiveness while improving security.
2Measurement precision
If error location information is fully exposed during testing, then debugging precision is improved, but security is worsened because true error locations can be exploited for attacks
Solution Approach 1:
The patent extracts only the essential error detection information (error count) while removing the harmful detailed error location information. The system calculates the number of errors in test data and outputs only this aggregated information, discarding the specific positions of errors. This extraction maintains debugging capability while eliminating security risks.
Solution Approach 2:
The patent introduces an intermediary processing step that transforms detailed error location information into aggregated error count information. This intermediary function acts as a buffer between the detailed test results and the external output, providing error detection capability while preventing direct exposure of sensitive error location data that could be exploited.
Data Source
AI summary
A method in a memory device that operates in a testing mode, includes receiving a vector to be written to the memory device. The vector is written to the memory device only if the vector belongs to a predefined set of test vectors. If the vector does not belong to the set of test vectors, the vector is converted to one of the test vectors, and the converted vector is written to the memory device.