Secure Programming Circuit Randomizes Flash Memory Bit Order

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Solution Overview

Problem

Flash memory devices are vulnerable to side-channel attacks that allow hackers to reconstruct programmed data by monitoring power consumption patterns during programming, especially when bits are written in a predictable order.

Innovation Solution

A secure-programming circuit (SPC) randomizes the order in which bits are programmed in the flash memory, using a scrambler to generate random permutations based on an invertible matrix and random bits, making it difficult for attackers to reconstruct the data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bits are programmed in a predictable order, then programming is simple and fast, but the memory becomes vulnerable to side-channel attacks

Engineering Contradiction:
ImprovesecurityVSAvoidprogramming complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A random permutation sequence is generated and stored in a buffer before the actual programming operation begins. This preliminary randomization of bit order prevents side-channel attacks by ensuring that power consumption patterns cannot be correlated with the logical data values, while the buffered sequence maintains programming efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A permutation buffer acts as an intermediary between the data input and the programming circuit. The buffer holds the random permutation sequence that maps logical bit positions to physical programming positions, decoupling the predictable data flow from the randomized programming sequence to eliminate security vulnerabilities.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a random permutation is used for programming bits, then security against side-channel attacks is improved, but programming time increases

Engineering Contradiction:
ImprovesecurityVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The random permutation sequence is generated and buffered in advance before programming begins. This allows the actual programming operation to proceed efficiently by simply following the pre-computed sequence, minimizing the time penalty while maintaining security benefits.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system changes the parameter of bit programming order from sequential to random permutation. By using a predetermined random sequence stored in a buffer, the system achieves security through parameter transformation while maintaining programming speed through efficient buffer management.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If bits are programmed sequentially, then power consumption patterns reveal data information, but the programming process is simple to implement

Engineering Contradiction:
Improvedata protectionVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A permutation buffer serves as an intermediary layer between the simple sequential programming circuit and the security requirement. The buffer introduces randomization without requiring complex modifications to the core programming circuitry, achieving data protection through a relatively simple buffering mechanism.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Instead of modifying the fundamental programming circuit, the system creates a copy of the bit sequence in a buffer and applies random permutation to the copy. This allows the original simple programming circuit to remain unchanged while the buffered copy provides security through randomized ordering.

Inventive Principle:
Principle #26Copying

Data Source

PatentEP4318294B1Memory device and method for secure programming of non-volatile memory
Publication Date: 2025.08.06 WINBOND ELECTRONICS CORP
  • EP4318294B1 patent drawingFigure 1
  • EP4318294B1 patent drawingFigure 2~3
  • EP4318294B1 patent drawing

AI summary

A memory device includes a non-volatile memory (NVM) and a secure-programming circuit (SPC) (108). The SPC (108) is configured to receive a program-NVM instruction to program a given data word in a given location of the NVM, and, responsively to receiving the program-NVM instruction, to program bits of the given data word in the NVM in a random order.