Segmented ADC Circuit for Fast High-Resolution Signal Conversion
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Solution Overview
Problem
Existing methods for converting analog signals to digital signals in imagers with reduced sensor column widths face challenges such as slowness, high electrical energy consumption, achieving high resolution, and reliable signal representation, while also requiring a reduction in electronic circuit size and surface area.
Innovation Solution
A method and device that generate a staircase ramp of predetermined analog signals for most significant bits and use successive approximations for least significant bits, with a single comparator and capacitor for each channel, to efficiently convert analog signals into digital signals, reducing the number of components and improving speed and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a large number of electronic components are used for signal conversion, then conversion accuracy can be improved, but device complexity and circuit surface area increase
Solution Approach 1:
The patent applies segmentation by dividing the analog-to-digital conversion process into two distinct phases: a first phase that extracts most significant bits using a ramp comparison method, and a second phase that extracts least significant bits using successive approximation. This segmentation allows each phase to use simplified circuitry appropriate for its specific task, reducing overall component complexity while maintaining high conversion accuracy through the combination of both phases.
Solution Approach 2:
The patent introduces an intermediary residue signal that represents the difference between the analog input signal and the reconstructed signal from most significant bits. This residue serves as a mediator that bridges the two conversion phases, allowing the second phase to focus only on converting the remaining error term rather than the full dynamic range, thereby reducing the complexity of the successive approximation circuit.
2Productivity
If conventional conversion methods are used, then signal conversion can be performed, but conversion speed is slow
Solution Approach 1:
The patent segments the conversion process into two parallelizable phases that can operate independently. The first phase rapidly determines most significant bits using a simple ramp comparison, while the second phase simultaneously processes the residue to determine least significant bits. This segmentation eliminates the need for sequential processing of all bits, significantly improving conversion speed while maintaining full precision through the combination of both phases.
3Manufacturing precision
If sensor column width is reduced to improve image quality, then resolution can be improved, but electronic circuit surface area must be reduced
Solution Approach 1:
The patent segments the conversion function across two phases, allowing each phase to use minimal circuitry optimized for its specific purpose. The first phase uses only a ramp generator and comparator for most significant bits, while the second phase uses a simplified successive approximation circuit for least significant bits. This segmentation dramatically reduces the surface area required per sensor element, enabling high-resolution imaging with reduced column widths.
Solution Approach 2:
The patent employs a single comparator that serves dual functions: first as a ramp comparator for determining most significant bits, and then as a successive approximation comparator for determining least significant bits. This multi-functionality eliminates the need for separate comparator circuits in each phase, significantly reducing the electronic circuit surface area required for each sensor element.
4Measurement precision
If more bits are used for digital signal representation, then signal accuracy is improved, but electrical energy consumption increases
Solution Approach 1:
The patent segments the bit extraction process into two phases, where the first phase rapidly determines most significant bits using a low-power ramp comparison method, and the second phase determines least significant bits using successive approximation only on the residue signal. This segmentation allows the system to achieve high-resolution conversion while minimizing energy consumption by avoiding full-range comparisons for all bits.
Data Source
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AI summary
Method and device for converting analogue signals, of a plurality of pathways, into digital signals. A common circuit (2, 3) generates first analogue signals corresponding to high-order bits of digital signals. For each pathway, a first means compares the first analogue signals with the signal to be converted. A first means (18) stores high-order bits corresponding to the value of a first analogue signal close to the signal to be converted. A means (9) stores the deviation between the analogue signal to be converted and said first detected value. A generator means (11, 12) generates a predetermined number of second analogue signals. A second means compares by successive approximations said second analogue signals with said deviation. A means (20) stores said low-order bits corresponding to the results arising from said second means of comparison. A means (22) assembles said high-order bits and said low-order bits.