Segmented DAC Mismatch Correction With Subtractive Dithering
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Solution Overview
Problem
Segmented digital-to-analog converters (DACs) face challenges with inter-segment errors, leading to non-linear distortion, especially in large signals or deep digital back-off scenarios, where existing calibration methods are complex and inefficient, and inter-segment gain mismatches become dominant errors.
Innovation Solution
The implementation of subtractive dithering and digital segment mismatch correction, where subtractive dither is used to randomize inter-segment errors, and digital processing corrects segment mismatches by filtering and modifying input data, reducing the need for accurate error measurement and complex calibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If segmented DAC is used to achieve high resolution conversion, then conversion precision is improved, but inter-segment errors cause non-linear distortion and degrade signal quality
Solution Approach 1:
The patent measures inter-segment errors and feeds back correction values to the digital input data. A correction circuit adjusts the digital codes based on measured segment mismatches, creating a closed-loop system that continuously compensates for segmentation errors, thereby resolving the contradiction between using segmented architecture for high resolution and avoiding inter-segment distortion
Solution Approach 2:
The patent dynamically adjusts digital correction parameters based on measured segment characteristics. By changing the correction values applied to each segment's digital input, the system optimizes performance across different operating conditions, maintaining high precision while compensating for inter-segment variations
2Measurement precision
If traditional calibration methods are used to correct segment mismatches, then measurement precision is improved, but device complexity and calibration time increase
Solution Approach 1:
The system performs self-calibration by automatically measuring its own segment mismatches and generating correction values without external intervention. The calibration circuitry is integrated into the DAC itself, allowing the device to characterize and correct its own errors, thereby reducing calibration complexity while maintaining high segment matching accuracy
Solution Approach 2:
The patent performs error measurement and correction value generation in advance during a calibration phase, storing these correction values for use during normal operation. This preliminary characterization eliminates the need for complex real-time calibration, reducing operational complexity while maintaining precision
3Stability of the object's composition
If deep digital back-off is used to achieve linear operation, then signal linearity is improved, but noise floor increases and spectral purity degrades
Solution Approach 1:
The feedback correction mechanism actively compensates for inter-segment errors that would otherwise manifest as distortion and noise at deep back-off. By continuously adjusting digital correction values based on measured segment mismatches, the system maintains low noise floor and high spectral purity even when operating at low signal levels with deep digital back-off
Data Source
AI summary
A segmented digital-to-analog converter (DAC). The segmented DAC includes at least two DAC segments. The DAC includes at least one overrange DAC configured to generate a dither subtraction signal based on an overrange DAC control data, and a dither control circuit configured to add a dither to the input data for the segmented DAC and generate the overrange DAC control data to compensate the dither. The dither subtraction signal is combined with the output signals of the DAC segments in an analog domain. The DAC includes a segment mismatch correction circuit configured to modify the input data for the segmented DAC or input data for at least one segment to correct a mismatch error of one or more of the segments and/or the at least one overrange DAC.