Segmented Global Data Bus with Dual Sense Amplifiers
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Solution Overview
Problem
Current DRAM chip architectures are inefficient in terms of area utilization and timing due to the global sense amplifiers being connected to one end of the global data bus, leading to idle data paths and long signal distances, which limits bandwidth as workload and speed increase.
Innovation Solution
Placing global sense amplifiers on both ends of the global data bus and using a section select switch to direct signals along fast and slow paths, allowing data to share the same tracks without overlapping, and rotating banks to ensure equal distance to I/O pads, thereby increasing bandwidth without increasing the number of global data bus lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If global sense amplifiers are connected to one end of the global data bus, then the structure is simple, but the data path utilization is inefficient and timing is poor
Solution Approach 1:
The global data bus is segmented into multiple sections with sense amplifiers placed at both ends of each segment. This segmentation allows data to be transmitted from local data buses to either end of the global data bus, enabling parallel transmission paths and improving data path utilization efficiency without significantly increasing structural complexity.
2Device complexity
If global sense amplifiers are connected to one end of the global data bus, then the structure is simple, but the signal transmission distance is long
Solution Approach 1:
The global data bus is divided into segments with sense amplifiers positioned at both ends of each segment. This reduces the maximum signal transmission distance by allowing data to travel to the nearest sense amplifier, whether at the beginning or end of a segment, thereby halving the effective transmission distance compared to a single-end configuration.
3Productivity
If the number of global data bus tracks is increased to double the bandwidth, then the bandwidth increases, but the area utilization deteriorates
Solution Approach 1:
A section select switch is introduced to dynamically direct data signals to either end of the segmented global data bus based on the active section. This dynamic switching capability allows the same physical bus tracks to be reused by different sections at different times, effectively doubling the bandwidth without requiring additional bus tracks or increasing area.
Data Source
AI summary
Provided are a memory device and a memory bank comprised of a local data bus, a segmented global data bus coupled to the local data bus, and a section select switch that is configurable to direct a signal from the local data bus to either end of the segmented global data bus. Provided also is a computational device comprising a processor and the memory device and optionally a display. Provided also is a method in which a signal is received from a local data bus, and a section select switch is configured to direct the signal from the local data bus to either end of a segmented global data bus.