Segmented Gate Contact and Via Structure for Lower Resistance

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The scaling down of semiconductor devices increases complexity and contact resistance due to defects like voids and seams in gate via structures, which are challenging to address with traditional manufacturing processes.

Innovation Solution

Forming gate contact and via structures as separate entities in distinct deposition and growth processes, with the gate contact structure acting as a seed layer and growth promoter for the gate via structure, reducing the aspect ratio of the contact opening and minimizing defects, thereby reducing contact resistance by 10% to 50%.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional manufacturing processes are used to form gate via structures, then the devices can be manufactured with standard processes, but defects like voids and seams occur leading to increased contact resistance

Engineering Contradiction:
Improvecontact resistanceVSAvoiddefects in via structures
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The gate contact structure is segmented into two distinct parts: a gate contact structure formed first, and a gate via structure formed subsequently on top of it. This segmentation allows each structure to be optimized independently, with the contact structure providing a defect-free interface and the via structure providing the vertical connection, thereby reducing overall contact resistance and eliminating voids that would occur in a monolithic structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate contact structure is formed in advance before the gate via structure. This preliminary action creates a prepared interface that promotes proper adhesion and reduces the aspect ratio for subsequent via formation, preventing void formation and ensuring low contact resistance from the outset

Inventive Principle:
Principle #10Preliminary action

2Reliability

If gate contact and via structures are formed as separate entities in distinct processes, then contact resistance is reduced by 10% to 50%, but the manufacturing process complexity increases

Engineering Contradiction:
Improvecontact resistanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate contact structure serves multiple functions: it acts as the electrical contact interface, provides a seed layer for via growth, and reduces the aspect ratio for subsequent via formation. By combining these functions into a single preliminary structure, the process achieves low contact resistance without proportionally increasing complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Manufacturing precision

If the aspect ratio of contact opening is reduced, then defects like voids and seams are minimized, but the contact opening dimensions are constrained

Engineering Contradiction:
Improvedefect minimizationVSAvoidcontact opening dimension flexibility
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

By segmenting the contact and via structures, the contact opening can be optimized for low aspect ratio (improving manufacturing precision) while the via structure extends vertically to provide the necessary connection, thus maintaining design flexibility without compromising defect minimization

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces gate contact resistance by minimizing defects and improving the electrical connection between gate structures and contact structures, enhancing the performance and reliability of semiconductor devices.

Implementation Method 1

Forming gate contact and via structures as separate entities in distinct deposition and growth processes

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS12002885B2Gate contact and via structures in semiconductor devices
Publication Date: 2024.06.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12002885B2 patent drawing
  • US12002885B2 patent drawing
  • US12002885B2 patent drawing

AI summary

A semiconductor device and methods of fabricating the same are disclosed. The semiconductor device includes a substrate, a fin structure disposed on the substrate, a source/drain (S/D) region disposed on the fin structure, and a gate structure disposed on the fin structure adjacent to the S/D region. The gate structure includes a gate stack disposed on the fin structure and a gate capping structure disposed on the gate stack. The gate capping structure includes a conductive gate cap disposed on the gate stack and an insulating gate cap disposed on the conductive gate cap. The semiconductor device further includes a first contact structure disposed within the gate capping structure and a first via structure disposed on the first contact structure.