Segmented Non-Volatile Memory for Concurrent Programming Tests

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Solution Overview

Problem

Existing non-volatile memory testing methods simulate long-term use by programming and erasing memory cells individually, which is time-consuming and increases manufacturing costs.

Innovation Solution

Concurrently program multiple memory cells in different regions of a non-volatile storage apparatus using separate select lines to accelerate the testing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If memory cells are programmed and erased individually during testing, then testing accuracy is maintained, but testing time increases significantly

Engineering Contradiction:

Improvetesting accuracyVSAvoidtesting time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The memory array is divided into multiple independently controllable regions (e.g., planes or blocks), each with its own select lines. This allows different regions to be tested simultaneously through parallel operation, reducing total testing time while maintaining individual region test accuracy

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Multiple memory regions are combined into a single test operation by applying different voltage patterns to different select lines. The test controller coordinates simultaneous programming and erasing operations across multiple regions, achieving parallel testing that reduces overall test time without sacrificing accuracy

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If multiple memory cycles are performed to simulate long term use, then reliability assessment is improved, but manufacturing cost increases

Engineering Contradiction:

Improvereliability assessmentVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The memory is segmented into multiple regions that can be tested in parallel. By performing thousands of programming and erasing cycles simultaneously across multiple regions rather than sequentially, the total test time is reduced, thereby reducing manufacturing cost while maintaining comprehensive reliability assessment

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The testing process maintains continuous useful action by keeping multiple memory regions active simultaneously during programming and erasing cycles. This parallel continuous operation achieves the required stress testing for reliability assessment much faster than sequential testing, reducing the cost impact

Inventive Principle:

Principle #20Continuity of useful action

Data Source

PatentUS12562232B2Non-volatile memory with concurrent programming

Publication Date: 2026.02.24 SANDISK TECHNOLOGIES LLC

AI summary

A non-volatile storage apparatus comprises a non-volatile memory divided into blocks, with each block divided into regions. Each region of a same block includes a plurality of non-volatile memory cells controlled by a separate drain side (or different type of) select line for the region such that different regions of a same block are controlled by different drain side (or different type of) select lines. The non-volatile storage apparatus is configured to concurrently program memory cells in multiple regions.