Segmented MRAM Reference Cell Architectures for Noise Immunity
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Solution Overview
Problem
Conventional MRAM architectures face challenges in achieving reliable sensing operations and minimizing word line disturb during write operations, especially in segmented memory arrays, where optimizing current levels for robustness is difficult due to noise immunity and write disturb issues.
Innovation Solution
The implementation of a folded bit line scheme, where bit lines are segmented and paired to generate common-mode noise, and the use of multiple reference word lines to provide stable reference currents for sense amplifiers, ensuring reliable sensing operations by making noise common-mode and reducing word line disturb.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional reference bit line architecture is used with one RefBL allocated in every 16-32 bit lines, then the reference signal can be generated to provide middle voltage level, but noise immunity is reduced and write disturb issues occur in segmented memory arrays
Solution Approach 1:
The memory array is divided into multiple segmented blocks, each with its own dedicated reference bit line and reference word line. This segmentation isolates noise and write disturb effects to individual segments, preventing them from affecting the entire array. Each segment operates independently with its own reference signals, improving noise immunity and reliability of sensing operations.
Solution Approach 2:
Reference word lines are introduced as intermediary elements that connect reference cells to reference bit lines. These reference word lines act as mediators that enable selective activation of reference cells without directly disturbing the data cells. The intermediary structure allows for controlled reference signal generation while minimizing write disturb effects on the main memory array.
2Ease of operation
If conventional word line activation is used to select cells for read/write operations, then cell access is enabled, but word line disturb occurs during write operations affecting unselected cells
Solution Approach 1:
The array is segmented into independent blocks, each with dedicated reference word lines. This allows write operations to be confined to specific segments while reference operations in other segments remain unaffected. The segmentation prevents write disturb from propagating across the entire array, as unselected segments are electrically isolated during write operations.
Solution Approach 2:
Each segment is equipped with its own reference word line and reference bit line, creating local self-sufficiency. This local quality ensures that reference signals are generated locally within each segment without requiring global word line activation. The localized reference structure reduces the scope of write disturb effects and improves overall write operation reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances noise immunity and reduces word line disturb, allowing for robust and reliable sensing operations in segmented MRAM architectures by converting noise into a differential signal, thereby improving the overall performance of memory access.
Implementation Method 1
the implementation of a folded bit line scheme, where bit lines are segmented and paired to generate common-mode noise, and the use of multiple reference word lines to provide stable reference currents for sense amplifiers, ensuring reliable sensing operations by making noise common-mode and reducing word line disturb
Implementation Method 2
a sense amplifier compares a stored signal with a reference signal... The sense amplifier compares the reference current on RefBL with that of the selected bit line
Implementation Method 3
Magnetic Random Access Memories (MRAM) using Magnetic Tunnel Junction (MTJ) also compares the current of a stored cell with that of the reference, because magnetization direction of the free layer, either parallel or anti-parallel to the fixed layer, causes a difference in electrical resistance across MTJ
Data Source
Figure 1a~1b
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AI summary
Systems and methods for realizing reference currents to improve reliability of sensing operations of segmented semiconductor memory arrays have been achieved. Preferred embodiments of the invention comprise MRAM arrays but the invention could be applied to any other memories requiring access on small, segmented arrays. All embodiments of the invention comprise a folded bit lines scheme, either in adjacent bit lines or in segment-to-segment folded bit lines. In two embodiments alternate strapping of Poly-Si Word Lines in every second segment is achieved by metal layer of Read Word Line and Write Select Line. An embodiment has stored 1 and 0 cells on both sides of a selected segment to be read.