Segmented N-Buffer Layer for Stable IGBT Turn-Off
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Solution Overview
Problem
Conventional IGBTs and diodes face issues with uncontrollable power semiconductor devices due to increased off-loss and thermal runaway at high temperatures, snap-off phenomena during turn-off operations, and partial non-formation of the n-buffer layer leading to withstand voltage defects, which complicates high-temperature operation and increases the proportion of defective chips.
Innovation Solution
The semiconductor device features a vertical structure with an n-buffer layer having multiple buffer portions with varying peak impurity concentrations and distances from the back surface, where the first buffer portion nearest to the p-collector or cathode layer has the highest concentration, and subsequent buffer portions have gentler impurity concentration gradients, ensuring stable withstand voltage characteristics and reduced leak current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional n-buffer layer with uniform impurity concentration is used, then the manufacturing process is simple, but the device exhibits uncontrollable off-loss and thermal runaway at high temperatures
Solution Approach 1:
The n-buffer layer is divided into multiple buffer portions (first buffer portion, second buffer portion, etc.) with different impurity concentration ranges. The first buffer portion has impurity concentration of 1.0×10^16 to 1.0×10^18 cm^-3, while the second buffer portion has 1.0×10^14 to 1.0×10^16 cm^-3. This segmentation allows each portion to perform specific functions: the first portion provides thermal stability and prevents thermal runaway, while the second portion maintains low off-loss characteristics.
Solution Approach 2:
Different regions of the n-buffer layer are assigned different impurity concentrations to optimize local performance. The first buffer portion (closer to the p-collector layer) has higher impurity concentration to suppress thermal effects, while the second buffer portion (closer to the n-drift layer) has lower impurity concentration to minimize leak current. This local differentiation resolves the contradiction between thermal stability and off-loss reduction.
2Loss of energy
If the impurity concentration of the n-buffer layer is increased to reduce off-loss, then leak current decreases, but breakdown resistance under dynamic operation deteriorates
Solution Approach 1:
The n-buffer layer is segmented into portions with different impurity concentrations. The second buffer portion with lower impurity concentration (1.0×10^14 to 1.0×10^16 cm^-3) maintains breakdown resistance by allowing sufficient carrier plasma formation during dynamic operation, while the first buffer portion with higher concentration contributes to overall off-loss reduction through its proximity to the high-field region.
Solution Approach 2:
The impurity concentration is locally optimized: the region closer to the n-drift layer (second buffer portion) has lower concentration to preserve breakdown characteristics, while the region closer to the p-collector layer (first buffer portion) has higher concentration to reduce off-loss. This spatial variation in impurity concentration simultaneously achieves both objectives.
3Reliability
If the n-buffer layer is formed with high impurity concentration to improve withstand voltage characteristics, then voltage retention improves, but snap-off phenomena occur during turn-off operations
Solution Approach 1:
The n-buffer layer is divided into multiple portions with graded impurity concentrations. The first buffer portion with higher concentration (1.0×10^16 to 1.0×10^18 cm^-3) provides the electric field distribution needed for stable withstand voltage characteristics, while the second buffer portion with lower concentration (1.0×10^14 to 1.0×10^16 cm^-3) prevents snap-off phenomena by allowing adequate carrier plasma during turn-off transitions.
Solution Approach 2:
The impurity concentration parameter is changed spatially across the n-buffer layer thickness. By creating a gradient from higher concentration near the p-collector interface to lower concentration near the n-drift layer interface, the device achieves both stable voltage retention and smooth turn-off characteristics without snap-off oscillations.
Data Source
AI summary
An active cell region, an edge termination region surrounding the active cell region and an intermediate region located at an intermediate position between these regions are provided, the active cell region has a trench gate type MOS structure on a top side, and a vertical structure on a bottom side includes a p-collector layer, an n-buffer layer on the p-collector layer, and an n-drift layer on the n-buffer layer, the n-buffer layer has a first buffer portion provided on the p-collector layer side, and a second buffer portion provided on the n-drift layer side, the peak impurity concentration of the first buffer portion is higher than the peak impurity concentration of the second buffer portion, and the impurity concentration gradient on the n-drift layer side of the second buffer portion is gentler than the impurity concentration gradient on the n-drift layer side of the first buffer portion.


