Segmented SCR ESD Protection Device with Doped Injection Layers
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Solution Overview
Problem
Existing electrostatic discharge protection devices for integrated circuits face challenges with high trigger voltage and low holding voltage, leading to increased risk of latch-up and ineffective protection against electrostatic discharge, particularly in integrated circuits with operating voltages between 20V-40V.
Innovation Solution
The introduction of at least two electrostatic discharge protection units connected in series, each comprising a P-type substrate, P-type epitaxial layer, N-type buried layer, and doped injection layers, which allow for adjustment of trigger and holding voltages through the epitaxial wafer high voltage process or SOI wafer high voltage process, providing self-isolation and reducing the risk of false triggering due to noise effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional SCR structure is used for electrostatic discharge protection, then the device provides electrostatic discharge protection, but the trigger voltage is too high (approximately 60V) and the holding voltage is too low (approximately 10V), making it ineffective for integrated circuits with operating voltages of 20V-40V and increasing the risk of latch-up
Solution Approach 1:
The patent divides the single SCR structure into multiple SCR units connected in series. Each SCR unit has its own doped regions and wells, creating a segmented structure that allows independent control of trigger and holding voltages. This segmentation enables the overall device to achieve both high trigger voltage and high holding voltage, resolving the contradiction between protection effectiveness and latch-up risk.
Solution Approach 2:
The patent introduces doped layers with specific doping concentrations and types (P-type and N-type) at different locations within each SCR unit. By locally adjusting the doping quality in different regions (emitter, base, collector areas), the device achieves optimized voltage characteristics - high trigger voltage for protection and high holding voltage to prevent latch-up, simultaneously addressing both requirements.
2Reliability
If additional ESD protection devices or circuits are added to protect internal circuits, then the electrostatic discharge tolerance is increased, but the device area increases
Solution Approach 1:
The patent designs the SCR-based ESD protection device to perform multiple functions within a single structure: electrostatic discharge protection, voltage clamping, and latch-up prevention. The segmented SCR units with doped layers provide both high trigger voltage for effective ESD protection and high holding voltage to prevent latch-up, eliminating the need for separate protection circuits and reducing overall device area while maintaining high reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration achieves appropriate trigger and holding voltages, enhancing the electrostatic discharge protection capability while maintaining a smaller device area and lower manufacturing costs, effectively preventing latch-up and ensuring reliable protection for integrated circuits.
Implementation Method 1
When the P-N junction between the P-type substrate 11 and the N-type well 12 is avalanched, the SCR device is turned on
Data Source
AI summary
An electrostatic discharge (ESD) protection device is provided. A proper trigger voltage is determined by providing an ESD doped injection layer into a PNPN structure and adjusting the injection energy and dosage of the ESD doped injection layer; a proper holding voltage is obtained by adjusting the size of the ESD doped injection layer, thus preventing the latch-up. The self-isolation effect of the electrostatic discharge protection device is formed on the basis of an epitaxial wafer high voltage process or a silicon-on-insulator (SOI) wafer high voltage process, the ESD protective device of the present invention can prevent the device from being falsely triggered due to noise interference. Compared with other known ESD protection devices, the device has the same electrostatic protection ability, much smaller area, and much lower cost.