Segmented Sidewall Bevels for Higher Reverse-Blocking Thyristors
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Solution Overview
Problem
The reverse blocking voltage in semiconductor devices, particularly in positive-negative bevel thyristors, is limited by a punch-through effect caused by the upturning electric field next to the positive bevel, which restricts their voltage capability.
Innovation Solution
A semiconductor device with a side surface featuring multiple partial regions, where the first partial region forms a negative bevel and the second partial region forms a positive bevel, arranged at distinct angles to spread the electric field and prevent punch-through, thereby increasing the reverse blocking voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a positive-negative bevel thyristor is used, then the device structure is optimized for symmetric blocking, but the reverse blocking voltage is limited by punch through effect caused by upturning electric field
Solution Approach 1:
The side surface is divided into multiple partial regions (first, second, third partial regions) with different bevel angles. The first partial region has a first bevel angle, the second partial region has a second bevel angle, and the third partial region has a third bevel angle. This segmentation allows different zones to manage the electric field differently, preventing concentration and punch-through effects while maintaining reliable reverse blocking voltage capability.
Solution Approach 2:
Different partial regions of the side surface are assigned different bevel angles tailored to local electric field requirements. The first partial region near the first pn junction uses a specific angle to manage field distribution, while the second and third partial regions use different angles to control field upturning. This local optimization prevents harmful field concentration without compromising overall device performance.
2Reliability
If the width of the n-base is increased to improve reverse blocking voltage, then the blocking capability increases, but the device dimensions and complexity increase
Solution Approach 1:
Instead of increasing the n-base width, the invention changes the geometric parameters of the side surface by introducing multiple partial regions with different bevel angles. This parameter change in the surface geometry allows better electric field management and increased reverse blocking voltage capability without modifying the fundamental n-base dimension, thus avoiding increased device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The modified side surface design effectively increases the reverse blocking voltage by spreading the electric field, allowing for higher voltage capabilities without the need to increase the width of the n-base, thus enhancing the performance of semiconductor devices like thyristors.
Implementation Method 1
the reverse blocking voltage can be limited in a positive-negative bevel thyristor by a punch through effect caused by the upturning electric field next to the positive bevel
Data Source
AI summary
A semiconductor device with a semiconductor body is specified, the semiconductor body extending in a vertical direction between a first main surface and a second main surface opposite the first main surface. The semiconductor body comprises a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type different from the first conductivity type thereby forming a first pn junction, wherein the first semiconductor layer is more heavily doped than the second semiconductor layer. A side surface of the semiconductor body extending between the first main surface and the second main surface delimits the semiconductor body in a lateral direction comprises a first partial region and a second partial region, wherein the first partial region and the second partial region delimit the first semiconductor layer in regions.


