Segmented Trench Semiconductor Layout for Faster Reverse Recovery
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Solution Overview
Problem
Conventional semiconductor devices, such as IGBTs and FWDs, face challenges in optimizing the arrangement of trench portions and inter-trench regions to enhance switching characteristics and reduce electric field concentration, leading to suboptimal performance in terms of ON voltage and reverse recovery time.
Innovation Solution
The semiconductor device incorporates a novel arrangement of trench portions, including the separation of trench portions into partial trenches and the introduction of inter-trench regions with specific doping types and concentrations, which facilitates improved carrier injection and extraction, thereby reducing ON voltage and enhancing switching characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If trench portions are arranged closely to increase device density, then device integration is improved, but electric field concentration increases leading to higher breakdown voltage requirements
Solution Approach 1:
An inter-trench region is introduced as an intermediary structure between adjacent trench portions. This inter-trench region contains a second doped region with a second conductivity type that acts as a mediator to distribute and reduce electric field concentration in the high-density trench arrangement, thereby resolving the contradiction between device integration and electric field management.
Solution Approach 2:
The patent applies local quality by creating distinct doped regions with different conductivity types in specific locations. The first doped regions in the trenches have one conductivity type, while the second doped regions in the inter-trench regions have a different conductivity type, optimizing local electrical properties to reduce electric field concentration while maintaining high device density.
2Reliability
If trench portions are separated into partial trenches to optimize carrier extraction, then switching characteristics are improved, but device complexity increases
Solution Approach 1:
Each trench portion is segmented into multiple partial trenches that extend to different depths within the semiconductor substrate. This segmentation allows optimized carrier extraction at different levels while maintaining a systematic structure. The partial trenches are arranged in a pattern that balances the complexity increase with the improvement in switching characteristics through enhanced carrier management.
Data Source
AI summary
A semiconductor device includes: an inner region including a base region of a second conductivity type provided between an upper surface of the semiconductor substrate and the drift region; and well regions having a higher doping concentration than that of the base region, provided from the upper surface of the semiconductor substrate to a depth position greater than a lower end of the base region, and arranged with the inner region interposed therebetween at the upper surface of the semiconductor substrate. The inner region includes a longitudinal side in a predetermined longitudinal direction at the upper surface of the semiconductor substrate and a plurality of trench portions which extend from the upper surface of the semiconductor substrate to the drift region. At least one of the trench portions is separated into two or more partial trenches in the longitudinal direction, in a region which does not overlap the well regions.


