Segmented Vertical Conductive Structures for High-Density PCBs
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Solution Overview
Problem
The increasing demand for higher circuit density and speed in printed circuit boards (PCBs) is hindered by the limitations of traditional vias, including large surface area and yield issues in drilling, cleaning, and plating, particularly with smaller hole sizes and thicker boards, which lead to increased costs and complexity.
Innovation Solution
The implementation of vertical conductive structures with electrically isolated segments, formed by creating slots and conductive layers on the substrate, allowing for reduced surface area and improved plating efficiency, using techniques such as electrolytic plating and dielectric filling materials to enhance signal integrity and reduce the influence of via stubs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional vias are used to provide layer-to-layer interconnection, then the PCB can achieve basic connectivity, but the surface area is too large for new generations of components and drilling, cleaning, and plating yield issues occur
Solution Approach 1:
The via structure is segmented into multiple conductive segments separated by dielectric material. This segmentation reduces the continuous surface area that requires plating while maintaining electrical connectivity through multiple discrete plated sections, thereby improving plating yield and reducing surface area simultaneously.
Solution Approach 2:
The invention transitions from a traditional single-hole via to a multi-segment vertical conductive structure that utilizes the vertical dimension more effectively. By creating multiple conductive segments stacked vertically with dielectric separation, the structure achieves better plating efficiency while reducing the horizontal surface area footprint.
2Quantity of substance
If hole size is reduced to accommodate smaller components, then component density increases, but drilling, cleaning, and plating yield issues worsen
Solution Approach 1:
The vertical conductive structure is divided into multiple conductive segments separated by dielectric material. This segmentation allows each segment to be plated independently with larger effective plating surface area, improving plating yield even when the overall via footprint is reduced to accommodate higher component density.
Solution Approach 2:
The invention changes the geometric parameters of the via structure by creating elongated vertical segments rather than a single continuous hole. This parameter change increases the effective plating surface area to volume ratio, improving plating yield while allowing smaller overall via footprints for higher component density.
3Productivity
If via size is reduced to increase circuit density, then more components can be accommodated, but plating efficiency decreases and costs increase
Solution Approach 1:
The via is segmented into multiple conductive portions separated by dielectric material. This segmentation creates multiple plating surfaces within a compact vertical structure, maintaining high plating efficiency while reducing the horizontal space required, thereby enabling higher circuit density without sacrificing manufacturing ease.
Solution Approach 2:
The vertical conductive structure uses composite construction with conductive material segments separated by dielectric material. This composite structure optimizes both plating efficiency (through multiple conductive surfaces) and space utilization (through compact vertical arrangement), enabling high circuit density with maintained manufacturing efficiency.
4Adaptability or versatility
If layer count is increased to achieve higher circuit density in dense areas, then PCB functionality improves, but manufacturing complexity and cost increase
Solution Approach 1:
The invention utilizes the vertical dimension more effectively by creating multi-segment conductive structures that provide interlayer connectivity without requiring additional horizontal layers. This dimensional optimization allows high circuit density to be achieved through vertical integration rather than increasing the number of PCB layers, thereby reducing manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the complexity of plating systems, increases yield, and decreases costs by providing a more efficient method for creating high-density PCBs with minimal signal distortion, while accommodating smaller pin pitches and higher layer counts.
Implementation Method 1
a conductive layer of a first conductive material being deposited on the surfaces of the substrate and sidewalls
Implementation Method 2
a dielectric filling material being introduced into the slot to electrically isolate the conductive segments from one another
Data Source
AI summary
A method for producing a printed circuit board is disclosed, In the method, a slot is formed in a substrate having at least three layers with the slot extending through at least two of the layers. The slot has a length and a width with the length being greater than the width. The sidewall of the substrate surrounding the slot is coated with a conductive layer. Then, the conductive layer is separated into at least two segments that are electrically isolated along the side wall of the substrate.